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Bandwidth of Logic Analyzer
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NaxFM:
Hi guys, I have finally decided to buy an "high end" logic analyzer, specifically the Digital Discovery from digilent.
The thing is that I'm very unsure of what the actual bandwidth specification means.
I know that usually the bandwidth is the frequency at which a sine wave gets attenuated by 3db, but speaking about logic analyzers, we are talking only about digital signal, so I'm really not sure if the bandwidth follows the same definition as before or it actually means the max digital frequency at which the analyzer works reliably.
The digital discovery can sample at 800Ms/s and it has a bandwidth of 100Mhz, so the sample rate is really plenty for the max bandwidth (at least using only 8 channels)
Now, my doubt is: what if the bandwidth follows the same rules as with oscilloscopes? In this case I could only reliably use it only for square waves of up to 20 Mhz, so that at least the third harmonics stays within the bandwidth. If that's the case, what's the point of having such high sample rates if 200 or even 100Ms/s would be enough for the job?

So, after this unnecessary rant, my question is: what does the bandwidth figure means in logic analyzers?
And if the bandwidth follows the same rules as oscilloscopes, do I really need to have at least the third harmonic within the bandwidth or it doesn't really matter since we are talking only about logic states, so the actual waveform is not important?

Inviato dal mio Moto G (5S) Plus utilizzando Tapatalk

tggzzz:
The significant (time) parameter for logic analysers is the number of samples per second per pin.
Gyro:
Thinking of it in bandwidth terms is not very helpful when looking at logic analysers. as tggzzz says, it's all about samples per second.

Take a 100MHz logic analyser for example. This will be sampling its inputs every 10ns. This is the minimum time interval that it can resolve.

If you want to know the timing relationship between two signals, if they transition within the same 10ns timing window, then it will say that their transition are simultaneous. If they transition in two adjacent timing windows, then their timing relationship can be anywhere between approximately zero (if they occur just before and after a sample) to a maximum of almost 20ns (one at the beginning of one sample window and the other at the end of the adjacent one) but it will report them as being 10ns apart. The same situation applies for individual signal pulse-widths.

Some LAs have glitch detection which will flag that a signal has gone from one state to the other and back within one sample period, but this requires significant extra complexity and is not that common.


P.S. If the analyser has an external clock input, then it can reduce uncertainty by synchronising the analyser to the system clock of whatever you're looking at. External clock capability is often specified at a lower maximum frequency though.
NaxFM:

--- Quote from: Gyro on August 05, 2019, 05:43:09 pm ---Thinking of it in bandwidth terms is not very helpful when looking at logic analysers. as tggzzz says, it's all about samples per second.

Take a 100MHz logic analyser for example. This will be sampling its inputs every 10ns. This is the minimum time interval that it can resolve.

If you want to know the timing relationship between two signals, if they transition within the same 10ns timing window, then it will say that their transition are simultaneous. If they transition in two adjacent timing windows, then their timing relationship can be anywhere between approximately zero (if they occur just before and after a sample) to a maximum of 20ns (one at the beginning of one sample window and the other at the end of the adjacent one). The same situation applies for individual signal pulse-widths.

Some LAs have glitch detection which will flag that a signal has gone from one state to the other and back within one sample period, but this requires significant extra complexity and is not that common.

--- End quote ---
Thanks for the reply. I understand that, but my doubt is still the same: what does the bandwidth figure means in logic analyzers?
If the only thing that matters is sample speed, then with the 800Ms/s of the digital discovery I could measure a 200Mhz square wave without any problem, or even an higher frequency signal, if I want to trade off precision.
But the specifications say that the bandwidth is 100Mhz, so my thought is that after that frequency the signal gets so attenuated that maybe it can miss some pulses. After all, there must be an attenuation at higher frequencies at the input of the analyzer.


Inviato dal mio Moto G (5S) Plus utilizzando Tapatalk

Gyro:
I'm not familiar with the digital discovery spec in particular but it sounds as if the inputs are not capable of toggling faster than 100MHz even if the internal FPGA is sampling at 800MHz....

This is not really surprising, it is pretty impossible for ordinary clip leads to toggle at that sort of frequency without glitches, crosstalk and ground bounce (not to mention capacitive loading effects). High-end LAs (eg. Agilent or Tek) have an awful lot of cost tied up in probe technology and terminations, individual screening and ground referencing and minimal loading, to achieve reliable probing at high frequencies. This is not something that you are going to find on low-end LAs. I'm afraid the Digilent doesn't count as high-end in this context.


EDIT: Looking at the Digilent Digital Discovery page, I see that they reference a "High Speed adapter" it looks as if this includes twisted pair individually grounded leads with 100R resistors in series at the source end. This is their alternative to High-end probes.

https://store.digilentinc.com/digital-discovery-high-speed-adapter-and-logic-probes/
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