Hello,
i am trying to use electric vlsi tools to make a chip with on semi C5 process to submit it to mosis for manufacturing
Are you sure this process is still available? They seem to have only one run this year, and not a lot of time left to submit.
>what is the sheet resistance of n-well resistor and what is the minimum width
>also what is the sheet resistance of poly1,poly2 and minimum width
>when we say sheet resistance do we mean one lambada width and one lumbada length that is w=0.3 um l=0.3 um or what are the dimensions of the sheet
>when designing a capacitor with poly1 and poly2 so what is the capacitance of the area of each poly
> and since poly1 has different capacitance per area than poly2 so do i have to use different areas of poly1 and poly2 to have matching capacitance
Do you have the design kit? If not, your chances of producing anything are essentially zero.
You can get the design kit for the process from MOSIS, but there is a LOT of paperwork involved.
But, it will have very detailed information on these parameters, although they may be encoded into device models. It probably wouldn't be hard to extract this from the models, but once you have models you may not actually need these parameters.
Jon
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