Electronics > Beginners
Best practices for glue logic for surface mount components?
jhpadjustable:
--- Quote from: tautech on October 27, 2019, 10:51:26 pm ---Routing for multi gate SMD packages is always the issue as you don't have the room to slip traces between pads like you do with DIP
--- End quote ---
1.27mm SOIC footprints, with 0.6mm wide pads, leaves a whole 0.57mm between pads. There's room enough for one trace on a 7.5mil design rule, and a very high probability the board house will leave the solder mask on top of it.
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