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BJT Behavior With C-B Junction Forward Biased?

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jeffsf:
Maybe it was a moment of inattentiveness decades ago in a classroom, or that back then the whole world assumed that you had ±15 V rails on everything, but I can neither recall or find on the web how an NPN BJT behaves (large signal) when the gate is positive with respect to the collector. Clearly the transistor is "on", but with the C-B junction forward biased, what is the collector current?

The specific application is for the PPS output from a BG7TBL GPSDO that outputs ±6 V that I need to convert to a level appropriate for a 3.3 V GPIO (input). While a MAX3232 can handle the serial lines, its nominal 300 ns delay (with un-spec-ed jitter) is "bothersome" for setting up an NTP server. (Rising-edge timing is "important", I believe, but may be wrong on this.)

I had thought that a simple NPN switch could handle limiting the voltages to 0-3.3 V when driven off the MPU's 3.3 V supply.



With ±6 V on the IN, it seems like it "should just work"

* +6 V on IN, ~ +3 V +0.6 V on base, transistor turns on (PN2222 td ~10 ns, tr ~25 ns, so expect ~35 ns), OUT drops below 3.3 V logic threshold.
* -6 V on IN, ~ -3 V on base (within PN2222 BVEBO of 5 V)  transistor turns off, OUT rises above 3.3 V logic threshold.
Edit: As noted by @glarsson below, the B-E junction will conduct once forward biased, limiting the VBE to somewhere around a volt or less, depending on transistor characteristics and operating point. Thanks for dusting off the old memories. Suggestions for a "better" transistor still welcome.

But what happens if the drive on IN is greater? RS232 receivers need to be able to accept ±25 V and I've got other timing devices that run off 24 V, so this may be more than just a desire for filling in my understanding.

Now, when the IN goes high, it raises the base above the collector, forward biasing the C-B junction. Does this then drive current into the V+ rail, or is the physics of the transistor such that the current across the B-E junction keeps the current flowing as it does when the C-B junction is more typically biased?

I assume that in operation at these voltages (putting -12.5 V on the base) that I'll need to clamp the base to ground such that BVEBO of ~ 5 V is not exceeded.

Finally, any better suggestions either for an NPN transistor that is notably faster than a PN2222, or a different circuit topology? I'll admit that my circuits courses were at the dawn of FETs and TTL still reigned as king, so FET switches aren't second-nature for me.

glarsson:
Base to emitter is a PN junction (a diode) so you can not drive it to 3V nor can you drive it above the 3.3V on the collector.

T3sl4co1l:
But since you asked: an NPN transistor reads the same both ways, so if you swap C and E, you get a de-facto collector current from the emitter, when the B-C junction is forward biased.  The gain is typically awful though, and obviously, you're limited to a collector voltage of Vebo (~7V?), except for special parts. :)

Tim

David Hess:
T3sl4co1l covered it.  With the collector-base junction forward biased, the collector and emitter are effectively swapped.  Some transistors are intended to operate in this mode and are constructed symmetrically like choppers but common transistors have very low current gain in this configuration and their base-emitter breakdown voltage is low limiting them to low voltages.

As glarsson points out in this circuit, the forward biased base-emitter junction will prevent forward biasing the base-collector junction so a single transistor will work fine as an inverting level shifter.  The common 1489 RS-232 receiver uses the same input structure.  With a suitable passive network, RS-232 can also directly drive a TTL threshold logic gate as well.

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