Is this an acceptable circuit (using BJT) for draining a capacitor?

[sparkydog]

In another thread, CountChocula helpfully provided the following circuit for discharging a capacitor that's part of an RC delay (thanks again!):



The intended function is that SENSE delivers some voltage which (slowly) charges CD. While SENSE is present, Q1 is on and blocks current. When SENSE goes open-circuit, Q1 turns off and allows CD to drain rapidly through R2. The goal is for CD to only hit some threshold voltage if SENSE stays on for some period of time, and for any interruption to reset the 'clock'.

We then got into a disagreement whether D1 is necessary, with both CircuitLab's time domain simulation (tip: block cookies if it wants you to log in) and CircuitJS (interactive) insisting that, not only is it not needed, but omitting it allows the capacitor to drain from "very low" to "zero" much more quickly. (In both cases, it drains from "high" to "very low" quickly through Q1. However, Q1 becomes high resistance as the voltage nears zero. Without the diode, the capacitor can still discharge through RD+R1.)

Now, in CountChocula's defense, it seems like D1 is indeed necessary to prevent Q1 turning on and blocking current. What the simulations seem to show, however, is that Q1's resistance is proportional to the difference between V_E and V_B, so long as V_B is non-trivially less than V_E... which it will be because RD/R1 effectively form a voltage divider.

So... "is this correct?" is an obvious question. (Note, I'm asking about the circuit without the diode.) More importantly, though, is this going to fry Q1?

[mikerj]

What voltage is going to be applied at SENSE?  If it's more than about 5v you need to consider Vbe reverse breakdown as there would be nothing limiting current other than source impedance of the sense voltage.

[sparkydog]

What voltage is going to be applied at SENSE?  If it's more than about 5v you need to consider Vbe reverse breakdown as there would be nothing limiting current other than source impedance of the sense voltage.

You know, if you looked at the simulation, you would have answers? 🙂

V_SENSE = 12 V. This, however, is where I'm confused; if a BC327 has a V_(BR)EBO = -5 V, what does that mean? It releases magic smoke if V_B > V_E + 5 V? It releases magic smoke if V_E > V_B + 5 V? It releases magic smoke if |V_B - V_E| > 5 V?

What does "nothing limiting current" mean? Nothing limiting current from where to where?

While charging, V_B = 12 V and V_E slowly climbs to 12 V, with current through Q1 measured in picoamps (i.e. negligible). While discharging, V_B is about 0.7 V lower than V_E and ~72 µA goes from E to B, and ~7.2 mA goes from E to C. All of these are maximums that decrease as the capacitor discharges.

[mikerj]

What voltage is going to be applied at SENSE?  If it's more than about 5v you need to consider Vbe reverse breakdown as there would be nothing limiting current other than source impedance of the sense voltage.

You know, if you looked at the simulation, you would have answers? 🙂

If you marked the schematic I wouldn't have to click on unknown links...

V_SENSE = 12 V. This, however, is where I'm confused; if a BC327 has a V_(BR)EBO = -5 V, what does that mean? It releases magic smoke if V_B > V_E + 5 V? It releases magic smoke if V_E > V_B + 5 V? It releases magic smoke if |V_B - V_E| > 5 V?

It means this is the guaranteed maximum reverse bias voltage you can apply to the BE junction before it breaks down (like a reversed biased Zener diode).  Reverse biased means the base is at a lower potential then the emitter.

What does "nothing limiting current" mean? Nothing limiting current from where to where?

Exactly what it says.  You have a voltage source connected to SENSE, which will reverse bias the base emitter junction when the capacitor is at a lower voltage than SENSE, and you have no resistive circuit element in that path to limit the current flow if the base emitter junction does break down.  The current will cause the capacitor to charge rapidly, so the voltage should drop below the breakdown threshold fairly quickly but it doesn't take much energy to damage the BE junction like this.

Even if the current is limited, BE breakdown should be avoided unless it's deliberate (e.g. noise generation) as it can cause a permanent reduction in transistor performance.

While charging, V_B = 12 V and V_E slowly climbs to 12 V, with current through Q1 measured in picoamps (i.e. negligible). While discharging, V_B is about 0.7 V lower than V_E and ~72 µA goes from E to B, and ~7.2 mA goes from E to C. All of these are maximums that decrease as the capacitor discharges.

If the BE junction breaks down the emitter voltage will not climb slowly, it will be a rapid increase.  You could add a diode in series with the base circuit to prevent the possibility of breakdown, but this will add another ~0.6v drop so the transistor will start turning off when the capacitor is around ~1.2v instead of ~0.6v.

[sparkydog]

Reminder: this is what I'm simulating:


...and I'm confused. In one place, you said:

Reverse biased means the base is at a lower potential then the emitter.

But in another place you said:

You have a voltage source connected to SENSE, which will reverse bias the base emitter junction when the capacitor is at a lower voltage than SENSE.
[...]
If the BE junction breaks down the emitter voltage will not climb slowly, it will be a rapid increase.

The latter only makes sense if the base is at a higher potential than the emitter. So, as I asked previously, which is it? Is V_B ≫ V_E bad? Is V_E ≫ V_B bad? Are both bad?

Here is the behavior of the circuit according to CircuitLab:





The instantaneous 12A spike when SENSE goes high is a little concerning, but other than that, I_B ≈ -20 pA while charging, and spikes briefly to ≈ -100 µA when SENSE goes open-circuit. (Note that that value is based on the capacitor charge < 6 V as shown, and may be higher if the cap is allowed to charge to a higher voltage.)

CircuitJS is not exhibiting the initial spike; otherwise, as far as I can tell it is entirely consistent with CircuitLab.

Are the simulations correct, or are both neglecting BE junction breakdown?

[wasedadoc]

So, as I asked previously, which is it? Is V_B ≫ V_E bad? Is V_E ≫ V_B bad? Are both bad?

The clue is in the word "reverse".  For a PNP transistor the base-emitter junction is reverse biased when the base is more positive than the emitter.

[TimFox]

Simple description of BE behavior:
By itself, the base-emitter junction acts as a Zener diode:
-- in the forward direction, acting as a forward-biased diode, it conducts at roughly 0.7 V, behaving as a silicon diode
-- in the reverse direction, acting as a Zener breakdown, it will conduct (strongly) at an amazingly small voltage:  typically 5 to 7 V for a normal silicon BJT.
If I remember correctly, before silicon planar construction became the norm, BE breakdown was comparable to BC breakdown.
For Si BJTs now, even for high-voltage BJTs (V_CEO > 100 V), the BE breakdown voltage remains low.

Specifically, the ancient 2N404 germanium PNP transistor has maximum ratings V_CE = 25 V, and V_EB = 12 V.
An early silicon transistor, 2N697 NPN, has maximum ratings V_CE = 40 V, and V_EB = 5 V.