Philosophically we try to get away from long logic equations, particularly those that are implemented as deep levels. There are only a few logic blocks used these days: random logic (and not much of that), multiplexors, decoders, priority trees, registers, counters and, the biggee, the Finate State Machine.

we don't play with MSI logic devices these days, everything is done with CPLD or FPGAs and the logic is described with a Hardware Description Language such as Verilog or VHDL.

There are old logic design books from the '70s that cover logic minimization and how to minimize and implement FSAs. Any of them will do.

DeMorgan's theorem, Karnaugh maps and for FSAs, Google has a lot of replies for 'minimizing state machines'.