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Breadboard 65c02 computer reliability/stability (er, lack thereof)
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sci4me:
Hey guys, so, recently I've started working on a 65c02 computer. I've had a small amount of success but it's been plagued by unreliability and instability. I have a WDC 65c02, an AT28C256 EEPROM, and a 65c51 on my breadboard, along with a 74LS04 for decoding purposes.

Basically what I'd like to hear about is what kind of things should I look for that might be causing the instability. By instability I just mean it simply doesn't behave as expected. I have a program in the EEPROM that just writes ASCII bytes to the serial port. I have seen it work many times but it seems to work maybe 1 in 50 times or less...

Unfortunately I (still) don't have the proper tools to properly debug it. I'm hoping to get a DS1054Z but at least for the next few weeks, I have nothing. This means my only hope of "debugging" is just fiddling with it; not an effective strategy.

But the fact that it does work rarely tells me that I've managed to connect things correctly and program it correctly. So I guess I'd just like to hear if there's anything obvious that I can look into that might be a problem for stability. One thing I ran into when I first started was the clock was actually too fast. I bought a 1 MHz crystal oscillator and have had no luck with it, so I ended up hooking up an Arduino and programming it to generate a ~500 KHz square wave (50%) and it worked fine. During my fiddling with it, I've tried slower clock rates (and slower baud rates for the serial port) but have had no luck with that.

I've attached a picture of my setup along with a schematic. Not sure if there's much anyone will be able to do to help without me being able to measure signals with a scope but I'm desperate. (Of course it's also entirely possible that there is some design mistake but I have yet to see it...)
oPossum:
Place 100 nF caps near the supply pins of each chip.

Make sure the power rails of the breadboards are not broken in the middle - it is common for them to be split.
GK:
For a start, don't use the PHI2O output pin on the WDC65C02 to drive anything. This is explicitly recommended in the datasheet. The WDC65C02 is designed to operate as high as 14MHz - much higher than the original 6502. To this end valid data is only guaranteed to remain on the data bus for 10nS after the (falling or rising - can't remember which ATM) edge of the PHI2 clock input. Propagation delay (uncontrolled and no longer specified/guaranteed in/for the WDC65C02) from the PHI2 input to the PHI2O output is a majority chunk (from my testing) of this 10nS, which (in the case that there isn't any data bus buffering between the '02 and the external devices, extending the data hold time by virtue of the buffering devices own internal propagation delays) eats away almost all remaining setup/hold time for write operations and makes for either unreliable or completely inoperable communications between the WDC65C02 and peripheral (VIA, PIC, ACIA.....) devices. 

The proper way to configure a system with the WDC6502 is to generate a robust clock signal/source and to use this to clock everything in parallel.

 
EDIT: found the general timing diagram and PHIxO notes. The datasheet isn't really as clear on this critical requirement as is ought to be.

sci4me:
I have taken the given suggestions; each chip now has a 100nF cap at its supply (plus the other caps littered on my supply rails) and I have moved the PHI2 input of the ACIA to be driven from the same source as the PHI2 input on the processor. Additionally I have verified that the power rails are not split.

I think the next thing for me to do is re-verify the software and each individual connection. ... I feel like I'm really running out of things to try without being able to look with a scope... but my desperation persists.
AndyC_772:
This is very, very like an A-level project I did at school - getting on for 30 years ago!

It was a great learning experience, though perhaps not in the way you'd expect. I had very few issues with the electrical design, but some major problems with the breadboard itself.

The main thing was power distribution. Simply daisy-chaining the power rails from one board to another didn't work, because the contacts were quite resistive, and multiple connections in series meant the voltage dropped too far. I remember that, with it in this state, adding decoupling capacitors across the power supplies of the chips actually prevented it from working at all.

Symptoms were truly bizarre, like: it had a 2 digit LED display, which would work fine until you put your hand near it, then it would gently  fade to a dim '88'. Move away and it's OK again.

The fix was simple, just run multiple wires from the supply to each of the individual power rails, then decouple properly.

IIRC it ran at 2 MHz and would have had a 32kx8 SRAM, with code stored in a 27128 EPROM. Input and output consisted of a numeric keypad, an ADC and a DAC, and it was used to do simple audio effects (echo, reverb, reverse etc).

Really enjoyed that project, even if it was ridiculous overkill under the circumstances.

I got an 'A'  :phew:
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