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Bypassing Loads Under Constant Current Efficiently

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T3sl4co1l:
Measure Vgs in the simulation and you will see what is wrong. :)

Tim

TheDood:
Thanks Tim,

Is 7V too low or too high? I get +7V - 0V when I've probed. Its actually the waveform I was intending if I'm looking at it correctly, I just don't know the Vgs typically required for switching 60V RMS (is that roughly accurate?, half of 120 sine wave?), 170V peak, with a 200Vds,130A, and 8mΩ Rds(on) rated FET? The FET gives a Vgs(th) of 3V-5V(max), so maybe a higher gate V, so saturation happens quicker?

T3sl4co1l:
You probed G-S across M1 or M2 in the above diagram and measured only 7V??

Tim

TheDood:

--- Quote from: T3sl4co1l on December 07, 2019, 07:38:11 pm ---You probed G-S across M1 or M2 in the above diagram and measured only 7V??

Tim

--- End quote ---
Nope haha, I realize I didn't measure the difference between the 2. I figured the difference would be equal to the size of the pulse V. I found some interesting results though.

It seems that both M1 & M2 hold a negative voltage at their source of about -3.8V-ish until the pulse triggers the Gate, which at that point the NMOS Source V comes up from -3.8V-ish to +0.8V-ish. I assume 0.8V must be the diode Vf?

In reality, on average, there's a 2.19V delta between NMOS Gate & Source, but it can be as large as 7.8V during Gate pulse trigger.

What I'm trying to conceptualize is why the NMOS isn't always on if it has a typical Vgs(th) of 3V? Wouldn't a -3.8V at the source pin, coupled with a 0V measurement at the gate, effectively satisfy the 3V Vgs(th) needed to begin to turn on? Is it turning on? Also, the pulse generator seems to have current bounce through it? It seems when the NMOS Source side diode is blocking +V, but a pulse comes at its gate, that current travels from the NMOS Drain pin through the NMOS, to the NMOS Gate and then onto the pulse generator?  It looks like there's a shove of current from drain to gate to pulse generator and then bouncing back, is this what you were talking about?

T3sl4co1l:
Well, the most important part is, the sources are alternately pulling above and below what you've declared as GND.  The AC lines are only alternately connected to ground via the diode bridge.  Half the time they're high up, supplying whatever Vout is, give or take.  If you're supplying a 30V load, goodbye Vgs(max).  Or say a line transient comes along, or someone just turns it on during a line peak.

Tim

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