Electronics > Beginners
Bypassing Loads Under Constant Current Efficiently
TheDood:
I'm playing around with LTspice and had some questions maybe someone can answer for me.
I'm simulating a capacitve power supply with a few Zener's as a dummy load. I'm trying to figure how to bypass the constant current source efficiently to reduce current flow through the Zener string. When I change the filter CAP placement I get different current characteristics through the diode string.
If I tie the +CAP lead into the cct before (NM2 + Schottky1), the current through the Zener string "throbs." If I tie the +CAP lead into the cct after the (NM2 + Schottky1), then the current through the Zener string is more consistent (~20-40mA ripple depending on duty cycle, no throb).
I've used 120Hz as the pulse frequency and have adjusted the "time on" between the 2 layouts to measure ~108mA average current flow through the Zener string. This ended up being 0.8ms "on time" for the layout with the +CAP lead tied in before the bypass, and 5.3ms "on time" for the layout with the +CAP lead placed after the bypass.
When the zener strings in both layout scenarios flow the same average current, the wattage burned across the bypass differs between the 2 layouts. When I see the "throbbing" current, or when +CAP lead is tied in after the bypass, the wattage burned across (NM2+R1) is ~0.595W, and the average wattage burned across load is ~2.83W, for ~82.5% efficiency (disregarding other components atm). When I see the more stable current, or when +CAP lead is tied in before the bypass, the wattage burned across (NM2+R1) is ~5.75W, and the average wattage burned across load is ~2.82W, for ~33% efficiency.
What I'm trying to accomplish is a couple things. I'd like to utilize the layout with the greater efficiency, but then I'm stuck with the throbbing current. I'd like to learn how to, or be pointed in the direction on how to remove the "throb," reduce current ripple (without using bigger coils), and decrease the burned wattage on the bypass.
(Disregard The other 3 Zener strings, they're just extra dummy loads)
Thanks
Ian.M:
What's the end objective? i.e:
* What sort of load are you trying to drive and what are its voltage and current requirements?
* Do you have any power factor or efficiency constraints?
Your schematic is a mess and makes it extrtemely hard to understand what's going on. I've de-f**ked it so its actually readable with all component designators and values visible in the standard LTspice default font size, converted decimals with excessive zeros after the d.p. to use engineering multiplier suffixes (based on S.I suffixes, see help file at 'LTspiceĀ®':'Introduction':'General Structure and Conventions') and shuffled stuff around till its in the conventional layout for a schematic: input on the left, output on the right, most positive rail at the top, most negative rail (or ground) at the bottom so I could attempt to follow the flow of your logic. I haven't sorted out your reference designators - generally its preferable to go with the default LTspice LETTERnumber style and if you edit them to be more meaningful, keep the initial capital letter, only changing it if it grossly offends (e.g. an IC that comes up as Xn may need changing to Um for consistency with other IC numbering on your schematic). Also, if you need multiple identical diodes in series or parallel check out instance parameters N and M in the help file at 'LTspiceĀ®':'Circuit Elements':'D. Diode' - you can model an array of diodes as a single component!
Once I had it sorted enough to follow it, my opinion of it is: If I wanted it to do anything useful, I wouldn't start from here!
Zero999:
I couldn't understand that schematic, so I redrew it.
What are you trying to achieve? You won't reduce the current consumption of this circuit like this. Yes shorting out the rectifier can take the load off the zener diodes but why?
Just some hints:
Avoid hiding things.
Try to put the ground node at the bottom.
Often it's more clear to use more than one ground connection.
Use SI suffixes, rather than loads of decimal places.
Also why take photographs of the screen with a camera? It results in huge files! Take screenshots with the print screen key. It's also possible to copy schematics to the clipboard, paste them into image editing software and save them in a compact file format. The image below is only 4.2kB.
EDIT:
Ian beat me to it, but I'll still post it anyway. He has a good idea with N=4;series, which means four in series. It does make the schematic more compact, at the expense of being slightly less self-explanatory.
Ian.M:
By the way, sticking comments in component parameters like I did for D5: N=4 ;series is not particularly well supported in LTspice.
Its only legal if its the LAST thing on the netlist line for the component so you can only comment the last parameter.
Also, you cant put a comment on a subsequent blank line in the generic component editor as without a parameter to anchor it, it will get deleted.
Many of the special purpose component editors may delete comments.
For schematics and waveforms, a 16 colour GIF or PNG is usually adequate, and *PLEASE* take time to crop the crap!
N.B on-screen data for channel and timebase settings in DSO screenshots is *NOT* crap, please don't crop what we need to make sense of your real-life waveforms!
TheDood:
Ha, well now I know. Input on left, output right, positive top, GND bottom, scientific notation, multiple GNDs and no hiding, thanks guys. I use my phone data for posting and lazied out with the screenshots (instead of transferring all the files from cpu to phone), I'll also crop the excess next time. I've picked up some helpful pointers and will implement in the future, thanks.
The load will be LEDs of different layouts. I figured series Zener's having the same avalanche V compared to the actual LED string Vf, would simulate in the same way. Maybe this is naive? I didn't want to spend the time researching how to build all the LEDs I wanted to simulate, though I did see a few LEDs in the diode drop down and will implement the "instance parameters" function to create strings of more likeness to the actual on the next sim.
I've not turned my attention to the PFC of the cct, but have intentions for a design with a PF >89%, and an efficiency >93% under the least favorable dimming scenario. This particular cct is attempting to simulate a string of LEDs with a Vf of ~26/27V @ 345mA.
Believe it or not but the schematic I posted was actually cleaned up considerably from what I was using lol. I've run countless trials and scenarios trying to gain a fundamental understanding and it gets messy, sorry for the confusion. I used the screen shots because they had the trans patameters listed which I had changed since the first set of file transfers from cpu to phone, it was to help you guys calculate averages (if you downloaded the .asc file) easier having the waveform shown peak to peak. Everytime I tried to zoom select it would adjust itself so that it wasn't magnifyimg only the selection but a little bit more, so it seemed changing the trans start and stop time was the only way I was able to achieve peak to peak waveform ranges for more accurate average calcs. I also couldn't figure out how to unhide things after I had hid them, I then got confused on which label I was amending ect. At least you guys were finally able to make ends and pieces of what I was testing lol I appreciate the info on implied cct design.
Any ideas on how to increase the efficiency? I'm thinking that feedback should be used but haven't given it much thought as to how it would be implemented..
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