I continue to find no written description or videos on this multiplex-by-segment ("MBS") system, and I think I will make a video on it because it is (what Auzzie-ism would Dave use?) really neat.
If all lines are driven by the MCU, MBS doesn't reduce the total number of lines required. Its advantage is the elimination of the seven resistors on the segment driver lines, and the transistors on the CC or CA driver lines, needed in a multiplex-by-digit system.
But if available GPIO pins are in short supply, either system may need to use an additional chip to fan out to the seven segments from a small number of GPIO outputs. Since MBS simply cycles through each of the segment lines one at a time, turning it ON no matter what is being displayed, the options for the decoder chip are expanded.
A 74xx138 3-to-8 decoder would work, but would require three GPIOs. However an 8-bit shift register would also work, and since we don't need the latching feature of the HC595, an HC164 could be used, which would require only two pins - data and clock. It would be initialized at power-up by clocking in eight zeros, so a Clear pin driver wouldn't be needed.
For common cathode displays, the most interesting option I've found is the ancient and lowly CD4017 decade counter with decoded outputs. Of course the HC version would be used, but this simply turns on one of 10 outputs on each clock cycle, which is exactly what's needed. This would also require two GPIO pins - clock and reset (active high). It has 10 outputs, but after 7 clocks (8 if using the decimal point), you would toggle the reset line instead of the clock, and that would leave the 0 output high, all others low.
Then I wondered if you could get away with just using the clock line. Using outputs 0 through 6 for the segments, you could wire the 7 output to the reset pin, which would reset the chip and leave the 0 output high. But that leaves the problem of the power-on state of the 4017, which I believe is unpredictable. There would need to be a way to generate an active high reset when Vcc comes up, or a way to read the current value of the 0 output without dedicating a GPIO pin to do that. Well, I'm still working on that, but if you could reduce the 7 GPIO segment pins to 1, Bob would definitely be your uncle.
Edit: I think the answer for single-pin driving of the HC4017 is to use the 4017's /CE pin as the falling-edge clock pin connected to the GPIO pin of the MCU, and connect a high-value resistor from that pin to the 0 output pin. Then you switch the GPIO pin between doing a HI/LO clock cycle in output mode and reading the pin in input mode, and stopping when the 0 output reads Hi. When that happens, set the output bit Hi to match what's already on the pin, then change direction to output. That prevents an unwanted clock tick from occurring. Something like 220K if that's not too much for driving the floating GPIO pin in input mode. You just want the largest resistor that still works reliably. Uncle Bob.