Can't understand '165 vs '597 PISO shift registers

[Moriambar]

Hi.
To clarify the subject, I know how to use a '165 shift register (well at least I think), but when searching for components to buy some, I was presented with the '597 chip. And I don't understand it.

Well why should one need an input flip-flop? Is it to capture a specific set of data and hold the value before shifting? Looking at the waveforms did not help much. But I'm starting feeling a bit confused: what does the '165 capture then?

Thanks for the help

[ledtester]

Have a look at the logic diagram for the 597 on page 3 (Fig. 4).

The 597 has an extra set of storage flip-flops which can be operated independently of the shift register FFs. The clock for the input FFs is STCP and SHCP for the shift register FFs. The logic diagram shows they are not connected in any way.

In this regard the timing diagram in Fig 6. is somewhat misleading because shows the shift register clock running all the time.

[jmelson]

On the 165, data are sampled at the end of the PL signal, the FFs are transparent latches.  So, except in exotic cases, you would never sample during the shifting out of data.

On the 597, you could sample duing the shifting of data without disturbing the data being shifted.  Then, the PL could be pulsed to transfer the held parallel data to the shift register.

Not a whole lot of cases where you'd need that, but somebody must have wanted it pretty badly.

Jon

[Benta]

Actually, the input latches are very nice. They decouple the timing of sampling the inputs from the actual data read. In my eyes, very useful.

[Moriambar]

Thanks