pullups and pulldowns on the same line

[madmaxbryan]

this is something i have never dealt with before and im completely stumped. My mcu's 5 volt tolerant digital i/o pins are internally pulled up to 2.3-2.6v, the chip im connecting to those pins to are internally pulled down. can i just connect them together? if i do wont that cause the mcu to be constantly sourcing current to the other chips pulldowns and just waste a lot of power when its idle?

[Bored@Work]

Schematic? Part numbers? Datasheets?

[David_AVD]

Pullups are usually only active on a micro pin when it's set to input.  As for the other chip, I think you'd need to give more info otherwise it's all just guessing.

[madmaxbryan]

the mcu is NXP's lpc1764FBD100, the receiving chip is the TB6560AHQ stepper motor driver

[David_AVD]

Check the data sheet, but I'd say that the pullup on the micro will not be enabled as you're using it as an output.  If that's the case, there is no issue that I can think of.

[madmaxbryan]

the mcu will be outputting PWM to control the Tb6560. i was just curious if theres a certain way to connect chips with different internal resistors. Can i just connect to the two together without using and external pullups or pulldowns? i haven't seen anything saying it wont be enabled when used as an output, ill keep reading though.

[David_AVD]

The pullups on PIC chips (for example) are not resistors permanently connected from Vdd to the pin.  They are weak current sources that can be enabled when the pin is set to input mode.  The data sheet will usually have a "typical I/O pin" diagram that shows how it's been implemented.

[madmaxbryan]

Im used to all datasheets for micros having pin diagrams but i didnt see one with this NXP chip, what i did found however was this in the datasheet "Most pins can also be configured as open-drain outputs or to have a pull-up, pull-down, or
no resistor enabled."

Thank you David_AVD and everyone else for your help!

[Bored@Work]

I think the confusion comes from footnotes like

5 V tolerant pad providing digital I/O functions with TTL levels and hysteresis. This pin is pulled up to a voltage level of 2.3 V to 2.6 V.

And no, I don't know what they mean with this. Esp. if this applies to input or output configuration.

Section 14.4 in the datasheet shows the typical I/O pin configuration. They have no special 5 V output provisions. Which is not surprising, because they have no 5V generator on the chip.

So what I understand is that you can just use the pins in two common output configurations, normal  push-pull or open-drain. In normal configuration you get a minimum of Vdd - 0.4 V, aka. 2.9V high level at 4 mA. That is good enough for the TB6560. If you check section 10.3, the 100K pull down should not be a problem.

In open-drain output mode you need an external pullup to pull the pin to 5V. It needs to be stronger than theTB6560s internal 100K pulldown. This would give you more wiggle room when looking at the required 2 V minimum high for the TB6560.

[Neilm]

You might want to work through what would happen on power up. I have had a few issues with circuits doing crazy things due to the mpu power cycling. In one case it would latch up and you had to remove all the power to get it to reset. Crazy thing was this was caused by the auto-off circuit.

Neil