Hello, so ive been trying to map out a design for a carrier board that would accept a standardized SOM based compute implementation. Where I'm having trouble is figuring out how to manage the PCIe signal routing, the current revision of the SOM pinout is designed for a max of PCIe 3.0 x4 lanes config, but many of the modules currently on the market vary between 1-2 PCIe 2.0 x1/x2 or just 1 PCIe 3.0 x1. Ideally, I want to make sure its possible so that if the module only has 1-lane it can be addressed to two different M.2 ports, either wifi or flash storage, based on user preference. I can also tell I'm probably going to want some similar flexibility with video and maybe USB outputs so that's a consideration as well.
Given their flexibility, is this the sort of thing an FPGA would be well suited for? Or would I be better off going for individual crosspoint switches for each of my signal types? This would be my first foray into FPGAs and I'm aware of the challenging learning curve, but I don't mind working through the long learning process if need be. Board space and noise are priorities of greater concern than cost, but ideally trying to keep the solution under $30 if I can, my initial overview of anything to do with highspeed PCIe is that it greats pricy fast.