Electronics > Beginners
Chip making process
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brucehoult:

--- Quote from: radiogeek381 on October 15, 2018, 01:19:26 am ---So, what is there to do? Over the past 30+ years I've seen several models:

* Use an off-the-shelf solution. Most applications can't justify the expense of custom solutions.
*    Find a vendor that has something close to the requirement and negotiate a "special version." (This is a comon approach in SOC markets, and is often the reason for lots of variants for one product.)
* (For digital applications) Use an FPGA or other configurable solution. (This often works out well for product volumes up into the ~100K units range.  Much depends on your ability to negotiate terms and prices with a vendor.
* Contract custom development to a design services organization. This can range from handing them a product requirements document all the way to giving them RTL or completed layout. Your internal cost rise as the handoff gets closer to the chip, your contracting costs rise the more you hand over to the design house. 
* Do it yourself.  There are a few heroic industrial projects that have done this on a shoestring, but the principals were able to finance the development out-of-pocket, and were tremendously talented, experienced, and lucky. (And they knew how to make their own luck.) In general, resist the temptation to assume "you can do it cheaper" because if you haven't done it before, you can't.
 
--- End quote ---

Coming soon (months, not years): SiFive Chip Designer https://www.sifive.com/chip-designer

Choose a set of preconfigured CPU cores, or customise your own with SiFive Core designer (https://scs.sifive.com/core-designer/). Add both SiFive and 3rd party IP blocks (hundreds to choose from). The IP blocks are free to use for prototype chips (shuttle runs).

The public pages are not live yet but the flow has been tested internally to recreate the FU540 (64 bit quad+one core 1.5 GHz ) from scratch and through into TSMC's flow and taped out. It works.

The vision:

[Disclaimer: I liked what they're doing so much I joined the company]
amyk:
I've heard that the Chinese foundries will let you get your own chips made at a tiny fraction of the cost of the traditional approaches, if you happen to know the right people....
ZeroResistance:

--- Quote from: srce on October 13, 2018, 07:35:20 pm ---
For prototyping, you want to use a multi-project-wafer (MPW). This will typically give you 40 to 50 die. Costs are a few thousand to hundred thousand, depending on the technology and die size. See here for actual pricing:

 http://www.europractice-ic.com/docs/180719_MPW2018-miniasic-v7.0.pdf


--- End quote ---
1. Had a look at that document, so they give prices for 1mm2 of silicon. So how much does fit on 1mm2 of silicon?
the Last I heard it is 100k gates for 0.18u. And each subsequent process node with double the density so for eg. 0.13u will be 200k gates.
2. So how many transistors make a gate ?
3. What about analog how many op-amps will fit in that area, or adc? It would be good to know if there is any document that shows transistor count per analog block? Like adc, dac, op-amp etc.
ZeroResistance:

--- Quote from: Richard Crowley on October 13, 2018, 07:53:49 pm ---All circuits are analog.  There is no such thing as a "digital circuit".  It all depends on how you use it.
All integrated circuits are "flattened to transistors at the lowest level" and resistors and capacitors and inductors and even transformers.

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From what I read here
https://semiengineering.com/analogs-unfair-disadvantage/,
They say that for analog chips smaller size increases certain issues? So there might be certain differences in an analog process and digital process.
ZeroResistance:

--- Quote from: amyk on October 15, 2018, 04:04:22 am ---I've heard that the Chinese foundries will let you get your own chips made at a tiny fraction of the cost of the traditional approaches, if you happen to know the right people....

--- End quote ---
Any idea which chinese foundries?
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