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Chip making process
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Wimberleytech:

--- Quote from: ZeroResistance on October 16, 2018, 04:10:07 pm ---Ok, so lets say Microchip wants to release a new 10F chip and its a 2mm^2 area per chip.
The would obviously have to get it made in a foundry.
What kind of costs would be they be looking at.
For the masks, and for getting it made at the foundry. Would Microchip need to place an order for 1 million pcs of the chip?
How do these things work out, will the foundry charge by area of silicon, that would me 2 million mm^2 of area.
Packaging would be a seperate expense right?

--- End quote ---

Here is ballpark based on what a 0.35um flash silicided poly, 4 layers of metal, with cap poly and poly resistor options
Mask costs not included here.
ZeroResistance:

--- Quote from: coppice on October 16, 2018, 04:38:58 pm ---You need to test a wafer, to locate the good dies. Then you package the good dies. Finally you need to test again, to make sure the packaging went OK.

--- End quote ---
If a wafer has 100 dies on it what would be the typically percentage of good dies?
ZeroResistance:

--- Quote from: Wimberleytech on October 16, 2018, 04:47:32 pm ---
--- Quote from: ZeroResistance on October 16, 2018, 04:10:07 pm ---Ok, so lets say Microchip wants to release a new 10F chip and its a 2mm^2 area per chip.
The would obviously have to get it made in a foundry.
What kind of costs would be they be looking at.
For the masks, and for getting it made at the foundry. Would Microchip need to place an order for 1 million pcs of the chip?
How do these things work out, will the foundry charge by area of silicon, that would me 2 million mm^2 of area.
Packaging would be a seperate expense right?

--- End quote ---

Here is ballpark based on what a 0.35um flash silicided poly, 4 layers of metal, with cap poly and poly resistor options
Mask costs not included here.

--- End quote ---

This is pretty amazing, did you rattle that off in a few minutes.
Just a bit out of depth with the terminology what does MLO mean? What's is probe yield?
How many wafers do I have to order from the foundry to get these sort of rates?
coppice:

--- Quote from: ZeroResistance on October 16, 2018, 04:54:34 pm ---
--- Quote from: coppice on October 16, 2018, 04:38:58 pm ---You need to test a wafer, to locate the good dies. Then you package the good dies. Finally you need to test again, to make sure the packaging went OK.

--- End quote ---
If a wafer has 100 dies on it what would be the typically percentage of good dies?

--- End quote ---
Yield depends a LOT on the complexity of the dies and what your pass/fail requirements are. If you have a hard transistor failure you have a dead die, but die may fail because their analogue parts are out of spec, or something won't run at full speed. Your test program can also affect yield, which is something non-obvious to outsiders, but you eventually find can have a real impact on profitability.

For an example, look at the Wimberleytech's information. Hist costs look high, so they may be old. His probe yield and final test yield are reasonable for the geometry and size of die he has, assuming its a tolerant design. An intolerant design (i.e. one where everything has to be just right to pass the production tests) may give much worse yields. If your wafer has only 100 dies they will be huge dies, and the yield will be a lot worse.
srce:

--- Quote from: ZeroResistance on October 16, 2018, 04:10:07 pm ---For the masks, and for getting it made at the foundry. Would Microchip need to place an order for 1 million pcs of the chip?
How do these things work out, will the foundry charge by area of silicon, that would me 2 million mm^2 of area.

--- End quote ---
They charge a one off fee for the masks, then per wafer.


--- Quote from: ZeroResistance on October 16, 2018, 04:10:07 pm ---Packaging would be a seperate expense right?

--- End quote ---
Yes
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