Question about op amps in analog front end

[nr4ps]

Hello,

I bought a Hantek 6022BE USB oscilloscope and am trying to understand the inner workings. I found the attached schematic of the analog front end, and am wondering why it is necessary to have two op amps for one channel. If I understand correctly, the first one is a voltage follower and the second is for amplification to get the signal to take up as much of the ADC range as possible to try to make use of its full resolution. But why can't they do both steps at once -- Why can't the analog mux and resistors go on the feedback path of the first op amp to do both? I don't imagine they would have included the extra amplifier if they didn't need it. Do the op amps behave better in this configuration?

Thanks.

[Kim Christensen]

From the AD8065 datasheet:

The inputs of the AD8065/AD8066 are protected with back-to-back diodes between the input terminals as well as ESD diodes to either power supply. This results in an input stage with picoamps of input current that can withstand up to 1500 V ESD events (human body model) with no degradation.
Excessive power dissipation through the protection devices destroys or degrades the performance of the amplifier. Differential voltages greater than 0.7 V result in an input current of
approximately (|V+ − V−| 0.7 V)/RI, where RI is the resistance in series with the inputs

So I guess they do it because the input impedance could be affected if the user overdrives the amplifier into clipping by adjusting the gain. ie: If the gain of U11/7 is set too high for the input voltage, and it's output clips rail to rail, it is possible that a little bit of current flows between the + & - inputs due to the differential voltage on it's input exceeding 0.7V.
By using a buffer amp (U12/9) the input won't get affected by the user changing the gain setting (x1 x2 x5 x10) to something that makes it clip and will only exhibit an impedance change if the voltage at the BNC exceeds +-50V

[dobsonr741]

The unity gain buffer would not change the protection situation. There might be other reasons why the design and the manufacturing process settled on this, for example:

The design earlier could have called a different, better unity gain amp, optimized for that role. The second opamp might be optimized for high gain. At the manufacturing stage or for cost cutting the same part might have been used. You never know, and I would not expect all decisions to be rational or serving a consistent customer centric view.

[Kim Christensen]

Perhaps a picture is better. The buffer amplifier (U12/9) prevents the loading on the DUT from changing when the user switches ranges under certain conditions:

[MasterT]

 Could be damage control. in case high voltage spike destroy first amp. Than uCPU has more chances to survive.
 
Design of the PGA seems not correct, better to switch just inverting input route to voltage divider ladder, w/o current passing via switches.

[MathWizard]

It's probably in a dual package ?

[Kleinstein]

For the high frequency part the input impedance / input capacitance can change a little when the gain is changed. So with all in one OP-amp one may need a slightly different compensation capacitor depending on the gain. The gain switching looks indeed not that great, but it may still be the lesser evil due to the capacitance of the switch chip.  An oscilloscope is usually of limited accuracy..

[Terry Bites]

I imagine that the buffer amp isolates the gain stage from the varying input network impedances.
Its a single opamp so its not a spare. The deisgner had a reason, real or imaginary.
It could be thought of as sacrifical but then the second amp could take one for the company just as well.

[David Hess]

So I guess they do it because the input impedance could be affected if the user overdrives the amplifier into clipping by adjusting the gain. ie: If the gain of U11/7 is set too high for the input voltage, and it's output clips rail to rail, it is possible that a little bit of current flows between the + & - inputs due to the differential voltage on it's input exceeding 0.7V.
By using a buffer amp (U12/9) the input won't get affected by the user changing the gain setting (x1 x2 x5 x10) to something that makes it clip and will only exhibit an impedance change if the voltage at the BNC exceeds +-50V

I think that is the reason which is specific to this particular operational amplifier.  Most suitable JFET and CMOS input operational amplifier support high differential input voltages without a change in input bias current.  The AD8065/AD8066 has an NPN bipolar input stage in parallel to take over if the JFET stage is cutoff at high common mode input voltage, but the bipolar input requires shunt protection which limits the differential input voltage.

I am ignoring differential capacitive effects because using a series feedback amplifier in an application where overload recovery is important is questionable anyway.  See below.

For the high frequency part the input impedance / input capacitance can change a little when the gain is changed. So with all in one OP-amp one may need a slightly different compensation capacitor depending on the gain. The gain switching looks indeed not that great, but it may still be the lesser evil due to the capacitance of the switch chip.  An oscilloscope is usually of limited accuracy.

Frequency response in this design varies with gain setting.  It is a toy.

[nr4ps]

Thanks for all the comments, everyone! I guess there isn't any single obvious answer, but it was very interesting to see everyone's take on it. Much appreciated!