Understanding MOS reverse circuit protection

[LoveLaika]

Similar to some other posts here, I'm working on a MOS-based voltage protection circuit to prevent bad things from happening if someone accidentally plugs in the voltage incorrectly. I'm having trouble understanding why it isn't working in the reverse direction, so I wanted to ask for help here.

My initial circuit was based on this app-note from ONSEMI. In it, they used a PMOS with the gate attached to an NMOS control to turn on/off via the NMOS gate.  In my case, I was trying to have the NMOS gate be tied to the input voltage so that when correctly plugged in, the load voltage will be the same as VIN. Otherwise, the NMOS will not turn on and the load voltage will be 0.

I've attached three different circuits. The first one shows the correct voltage polarity (MOS_FORWARD). The second one shows the input voltage connected incorrectly, though all I did was change the voltage to -14 volts (MOS_REVERSE). The third one shows the same as the second picture, but the PMOS is reversed with the input voltage being connected to the drain instead of the source (MOS_REVERSE_DRAIN_FIRST). I was always taught that for PMOS, current flows in the direction from source-to-drain (unlike the NMOS), so that was what the first two pictures were like. However, the third picture was based on this other article which I found after doing a search on other posts here where they had the PMOS flowing from drain-to-source.

It's a straightforward circuit. The input voltage gets divided, and it controls the NMOS. If the NMOS is on with its gate being positive, it pulls PGATE down to 0. Doing so causes the source-gate voltage of the PMOS (V_P-SG) to go up (be positive) and turn on, causing the voltage at the load to be the same as the voltage as the input. When the voltage is connected incorrectly like in the second photo, the NMOS sees a negative voltage at its gate, so it stays closed. Therefore, the PMOS gate will be the same voltage as the input (with the input voltage being negative here). V_P-SG will remain 0, so the PMOS is closed. That's the theory. The PMOS's threshold voltage is |2| volts while the NMOS's threshold voltage is 1.5 volts.

Unfortunately, my simulation shows something different. The forward direction works as expected, though with a small spike when the input voltage is turned on. However, the reverse voltage circuit doesn't work. The PMOS gate still experiences a small negative voltage when the NMOS is closed, not being close to the input voltage as expected. Furthermore, the PMOS is still open despite V_P-SG being less than 0. On the other hand, from the third picture, the circuit works despite the PMOS being reversed in orientation. Why is that? Could it have something to do with the drain-source voltage and the source-gate voltage of the PMOS that's causing it to not work in the reverse direction?

[Peabody]

The mosfet is supposed to be reverse oriented.  The reason is the body diode inherent in every mosfet.  The orientation has to have the body diode blocking the reverse current.  So with a P-channel mosfet, normal current flows from drain to source, and the body diode is forward biased.  But if the supply is connected wrong, the mosfet will be turned off because there is no G/S differential, and the body diode will be reverse biased.  So no current will flow.

If turned on, a mosfet will conduct pretty much equally in either direction, so the orientation doesn't affect normal operation.  This is not a switch.  So orientation as a switch isn't what you want.

This video is a good explanation:

[LoveLaika]

Thanks for the reply. Checking out the video helped make sense, though thanks to it, I still have some follow-up questions.

I suppose first off, you said that with the PMOS, I shouldn't look at it as a switch. ONSEMI's app note considers it as a switch, but if I'm using it for reverse-voltage protection, it wouldn't be a switch in this case. Am I right? Looking at ONSEMI's app note, they had a NMOS as a control switch. The NMOS controls the PMOS switch, and they're assuming that the input voltage is always positive. Under that assumption, the switch functions correctly. However, taking into account the body diode from drain-to-source, ONSEMI's circuit won't protect against a reverse voltage input; the reverse voltage would forward-bias the PMOS diode, so it will conduct regardless of the NMOS switch (based on my simulation results attached). Is that correct as well? If so, then ONSEMI's note is good when assuming the voltage is inputted correctly.

Next, how does the drain-to-source diode form? Is it inherent in the PMOS manufacturing process? The cross-section of the PMOS shows the drain and source as P-type substrate while the body is N-type substrate. So, there's a "diode" between the source-body and the drain-body. With the source (and body) grounded, applying a negative voltage at the gate attracts P-type holes to form the P-type inversion layer allowing for current to flow between source-and-drain. If they're both the same type of substrate, how does the diode form?

EDIT: Looking at other resources, it seems that the diode is probably a result of the manufacturing process (and any class that doesn't highlight that should refund their tuition). Looking through my old textbook, it shows the body terminal, but it never shows the diode between source/drain (NMOS) and drain/source (PMOS). It's quite infuriating how there's so many different symbols for MOSFETs, some simplified for easy reading but at the expense of omitting details (like in digital circuits it seems).

[Peabody]

ONSEMI's app note is about using mosfets as switches, not as reverse polarity protection.  The functions are completely different, and there's no way to implement both with a single mosfet.  To do both, you would need two mosfets in series, oriented in opposite directions.

Yes, I think the body diode is just what you get when you make a mosfet.

I think the mosfet symbols in your circuits are pretty much worthless.  I like to see them with the body diode shown.  I tend to screw up less when it's obvious which way the diodes go.  See an example below.

[LoveLaika]

Thanks. This makes more sense now (admitedly, a bit strange given what I was taught, but I'm good with it).

I think I get what you mean, have one PMOS handle the reverse voltage protection (I would put that one first) and then have another be implemented as a switch/in-rush current limiter? That's something to think about, and it certainly excites me to imagine how to implement such a scheme. With any luck, I can probably eliminate the need for the NMOS.

[magic]

Next, how does the drain-to-source diode form? Is it inherent in the PMOS manufacturing process? The cross-section of the PMOS shows the drain and source as P-type substrate while the body is N-type substrate. So, there's a "diode" between the source-body and the drain-body. With the source (and body) grounded, applying a negative voltage at the gate attracts P-type holes to form the P-type inversion layer allowing for current to flow between source-and-drain. If they're both the same type of substrate, how does the diode form?

EDIT: Looking at other resources, it seems that the diode is probably a result of the manufacturing process (and any class that doesn't highlight that should refund their tuition). Looking through my old textbook, it shows the body terminal, but it never shows the diode between source/drain (NMOS) and drain/source (PMOS). It's quite infuriating how there's so many different symbols for MOSFETs, some simplified for easy reading but at the expense of omitting details (like in digital circuits it seems).

It simply is a matter of the body being shorted to the source in every discrete three terminal MOSFET.
It's called "body diode" because it's the junction between the body and the drain.