The inrush current is not a problem because you can't get 3A of inrush current from a USB port!
Well, you can, with single board computers that use a big honking 5V rail directly on the USB.
(Odroid HC1 that I have is the problematic one. Sure, they fixed it in later revisions, but my version can supply all its supply can, about 6A in my case.)
Similarly, wall warts often can sustain pulses of currents with just a quick temporary sagging on the voltage.
Not all USB implementations are as reliable as those on laptops and PCs.
Again, to damage something having voltage is not sufficient.
I know; I'm a physicist, and know the theory, just have no practical experience, and am therefore a complete hobbyist.
I just checked the very first 40µs in the simulated circuit, with a 10Ω load. If the USB supply can provide enough current, the device gets a 0.2mJ pulse during that time. At its peak, 20µs after power being connected, the voltage over the load is 9V and current 900mA (over 8 W instantaneous power), which sounds to me like it could perhaps damage some delicate silica barriers used in semiconductors. And like I wrote above, I do have USB hosts that do not implement USB port current limiting at all, so I do consider it relevant. (The instantaneous power dissipated in the load is very close to a sin(x)² half-wave, and based on its wavelength, it corresponds to about 25kHz; that's pretty low-frequency oscillation for many circuits.)
What I do not know, is what kind of energy pulses different components can actually take. Is this acceptable circuit to power ICs? Or is it "safe" only in some circumstances, like when providing 5V to a voltage regulator? I do not know. My fears may be completely unwarranted.
The bead is there not for ESD reasons but to help combat high frequency noise.
True. It is just that the datasheets of the various ICs I use describe their ability to withstand such pulses in terms of ESD, typically referring to some standard of
human-body model. The one Wikipedia describes yields a narrow peak at 2kV/1.3A (over 2kW instantanous power) for example, but it decays very fast, the entire pulse being over in a microsecond.
I am talking about a "similar" event that takes about 50 times longer, but peak power is just one 250th of the ESD event. Surprisingly, the energy in the pulse is very similar, 0.2mJ, according to my Ngspice simulations using Qucs-S.
What does this have to do with the circuit OP showed?
If there is only a voltage regulator (that can handle the initial voltage spike) on the VUSB line, nothing.
But, if some hobbyist like me happens to read this thread, and sees the circuit, and thinks they could use it as-is to provide a smooth, filtered VUSB supply to their project, then what I am describing could perhaps bite them in the ass. (That is my fear, but cannot tell whether it is
practical fear or only a theoretical one.) So, it is very much related to the question at hand: in what situations is OP's schematic reasonable, and when it should be augmented with something else to be "safe", and why.
In other words, OP's "overkill or not" is not the only important qualification here: I'm trying to add "when is it safe? when might it bite one in the butt? Is there a better way to do this?"