CMOS 4050 IC as level converter

[npelov]

I was looking at 4050 datasheet and I found these texts:

The input-signal high level (VIH) can exceed the VDD supply voltage when these devices are used for logic level conversions.

"ABSOLUTE MAXIMUM RATINGS" section I see:
Input Voltage: -0.5 to Vdd+0.5V
So you can't have more than Vdd on input pin (according to ABSOLUTE MAXIMUM RATINGS).
And the "RECOMMENDED OPERATING CONDITIONS":
Vin =  0 to VDD
What?

I can see there is an input resistor, but they don't give it's value or current for Vin>Vdd.

And can someone explain to me the reason for the two diodes around the resistor to ground? I couldn't figure it out . Maybe if you have negative voltage first diode will burn and then maybe second diode will be current limited by the resistor? why would you put the first diode anyway.

I had a look at 74HC4050 equivalent IC. It's absolute maximum ratings clearly show that you can use it as logic converter without any input current limiting:
Vdd = -0.5 .. 7V
Vin = -0.5 .. 16V

[ignator]

I believe those two input diodes are the intrinsic substrate diodes formed as part of the doping of the pin pads. Note the diode of the Vdd power connection. The Vss is connected to the substrate.
Others here that have experience with IC fabrication can tell you how that input resistor is fabricated, but you know every IC has these intrinsic diodes, where input pins can not exceed the power pin's voltage if the diode is forward biased. These 4xxx series parts were susceptible to SCR type latch conditions back when they first came out, if your inputs exceeded the operating rails.

[Zero999]

That's confusing, elsewhere in the datasheet it implies the input can exceed VDD. I thought the whole point of the CD4050 was it can translate high logic voltages to lower voltages.

[edavid]

ST just messed up the datasheet.  Use the TI datasheet instead: http://www.ti.com/lit/ds/symlink/cd4050b.pdf

[SeanB]

The 4049/4050 are designed to interface 15V logic to 5v logic, so the inputs can have up to 15V input on them. you should not pull the inputs below ground, as then you will have a high risk of turning on the parasitic SCR in the chip and cooking it.

These chips were designed ( as the 4009/4010) to interface the first generation NMOS and CMOS memory devices, which required a 15V logic supply ( along with a -12V and sometimes a -21V supply as well, some needed a -5v supply as well) and which were TTL compatible on the inputs but not the outputs.