Do I need capacitors/resistors for interfacing parallel EEPROM with TM4C123G?

[markusz]

Hi experts,

I got an AT28C16 parallel EEPROM and would like to read/write with TM4C123G (the TIVA launchpad). What is bugging me is that I don't know how to tell, when interfacing with peripheral X (in this case X = AT28C16), do I need to connect the pins to resistors/capacitors?

(I watched the Ben Eater video and he is not using any resistor except for the LEDs)

Datasheet: As attached.

I'm trying to form some general rules and here is what I'm trying (but haven't tried on real circuit yet because don't want to burn anything):

-- Assuming: All MCU pins connected to the ROM are of GPIO mode (i.e. not in SSI/I2C/UART/etc. which may have requirements for resistors) ---

Step 1 - I should be able to know what kind of current flows from a GPIO pin, so in this case I know TM4C123G pins can be setup to output 2/4/8mA thus the maximum current is less than 10mA;

Step 2 - I should check what's the maximum current the peripheral can take. In this case I'm powering the ROM with a separate 5V power supply so I should consult the DC Characteristics datasheet of the ROM states, which states that Icc has 30/45mA for Com./Ind. (don't know what they mean). Anyway both are greater than 10mA so I should be fine without any resistor;

Step 3 - It is recommended, as I understand, to setup a parallel capacitor to the Vcc pin of the peripheral (ROM) to reduce the shock from powering up/down. But I guess it is not mandatory?

Just wondering did I misunderstand/miss anything? Please advise, thank you!

[rstofer]

The memory chip uses a 5V supply and has logic levels likely to be higher than the uC, a 3.3V device, can tolerate.  They make level shifters for this very application.

Maybe something like this:

https://www.sparkfun.com/products/12009

There are others...

https://www.digikey.com/en/products/filter/logic-translators-level-shifters/732

You do need decoupling capacitors adjacent to Vcc and Vss (as close as you can get) and these are nominally 0.1 ufd.  I can't imagine why you would need resistors unless you are thinking to do logic level shifting with voltage dividers.  Any other capacitors (beyond decoupling) likely aren't needed and certainly not on the GPIO pins.

If you use logic translators, there may be 2 Vcc connections.  They will both need decoupling capacitors.

Ben Eaters project is 5V from start to finish (IIRC).  That's easy!

[Manul]

MCU datasheet states, that GPIO are 5V tolerant. So level shifter is not needed, you are lucky. Just add bypass capacitor.

All GPIO signals are 5-V tolerant when configured as inputs
except for PD4, PD5, PB0 and PB1, which are limited to 3.6 V.

[Ian.M]

You also have to consider the min. Logic '1' threshold (V_IH) of the 5V device.   3.3V logic '1' driving 5V CMOS doesn't meet the 70% Vcc threshold typically required by CMOS gates to guarantee the input is seen as high.   It *frequently* works, but can bite you in the ass at temperature extremes or if you are unlucky and get a gate with an actual transition threshold close to the top of the permitted range, or even due to EMI, maybe even from the rest of the circuit.

Fortunately your AT28C16 datasheet says min. V_IH is only 2.0V so *THIS* *TIME* its not an issue.

[markusz]

The memory chip uses a 5V supply and has logic levels likely to be higher than the uC, a 3.3V device, can tolerate.  They make level shifters for this very application.

Maybe something like this:

https://www.sparkfun.com/products/12009

There are others...

https://www.digikey.com/en/products/filter/logic-translators-level-shifters/732

You do need decoupling capacitors adjacent to Vcc and Vss (as close as you can get) and these are nominally 0.1 ufd.  I can't imagine why you would need resistors unless you are thinking to do logic level shifting with voltage dividers.  Any other capacitors (beyond decoupling) likely aren't needed and certainly not on the GPIO pins.

If you use logic translators, there may be 2 Vcc connections.  They will both need decoupling capacitors.

Ben Eaters project is 5V from start to finish (IIRC).  That's easy!

Thanks, looks like I complete ignored the MCU. I guess one issue is that I don't know much about electronics, and because both the rom chip and the MCU chip are kinda black boxes to me, I don't really know what's the I and V going through/on each pin. I can only read the datasheet and follow the numbers blindly, but sometimes (like in this case) I can completely overlook something important.

[markusz]

MCU datasheet states, that GPIO are 5V tolerant. So level shifter is not needed, you are lucky. Just add bypass capacitor.

All GPIO signals are 5-V tolerant when configured as inputs
except for PD4, PD5, PB0 and PB1, which are limited to 3.6 V.

Thanks! Never thought about this to be honest. Actually, my lack of electronics knowledge probably bit me and will bite me in the future. As MCU and ROM chips are black boxes to me, I don't know exactly what's the electronics circuit behind (and even I do, probably don't know how to analyze them).

For example, what happens when GPIO pins are outputting signals? All I know that since they are outputting 0 and 1, it means they are outputting sort of low voltage and high voltage. I understand basic things such as TTL gates, but for GPIO pins, what exactly does it mean when we say "configured as inputs" or "configured as outputs"? When they are configured as outputs, wouldn't they still need to be tolerant to the voltage applied on them (or when they output 1 they are essentially wires?)?

[markusz]

You also have to consider the min. Logic '1' threshold (V_IH) of the 5V device.   3.3V logic '1' driving 5V CMOS doesn't meet the 70% Vcc threshold typically required by CMOS gates to guarantee the input is seen as high.   It *frequently* works, but can bite you in the ass at temperature extremes or if you are unlucky and get a gate with an actual transition threshold close to the top of the permitted range, or even due to EMI, maybe even from the rest of the circuit.

Fortunately your AT28C16 datasheet says min. V_IH is only 2.0V so *THIS* *TIME* its not an issue.

Thanks, again I missed some basics. From what I understand, this V_IH has nothing to do with the power supply, but with the pin outputs from MCU, is that correct? On the other hand, V_OH has a minimum of 2.4V, does that mean that the MCU pins connected to the I/O0~7 would receive at least 2.4V when they are READING from the rom chip? And then I need to check whether that is sufficient for a "1" signal for the MCU pins.

[Ian.M]

V_IH is the usual notation used for the voltage above which an input pin (or an I/O pin acting as an input) will detect logic '1'.   'min. V_IH' (or 'V_IH(min)')  refers to the *MINIMUM* voltage at which all (undamaged) chips of the specified type will *ALWAYS* detect logic '1'.  It may or may not depend on the Vcc of the chip in question.  if it does, it will be expressed as a proportion or percentage of Vcc or an expression involving Vcc, or as a list of values for various Vcc ranges.

Thanks, again I missed some basics. From what I understand, this V_IH has nothing to do with the power supply, but with the pin outputs from MCU, is that correct? On the other hand, V_OH has a minimum of 2.4V, does that mean that the MCU pins connected to the I/O0~7 would receive at least 2.4V when they are READING from the rom chip? And then I need to check whether that is sufficient for a "1" signal for the MCU pins.

If interfacing a 5V supply logic IC with a 3.3V MCU with 5V tolerant pins, its usually the other way around - you need to check if the 5V logic IC will 'see' the near 3.3V logic high from the MCU as logic high.  As I noted above, that's OK this time.   Its extremely unlikely that a 5V logic IC wont have a high enough output level to meet a 5V tolerant 3.3V MCU's  min. V_IH threshold voltage.  However as the AT28C16 datasheet says 'min. V_OH (@I_OH=-400uA)' is 2.4V then yes you *SHOULD* check it against your MCU's min. V_IH  for its 5V tolerant pins.

N.B. its quite common for a MCU to have different input threshold voltages for specific types of pin, and for them to vary with supply voltage.  Make sure you are reading the correct V_IH line in the datasheet!

Edit: corrected sentence order: "As I noted above, that's OK this time." referred to MCU V_OH => EEPROM V_IH

[markusz]

V_IH is the usual notation used for the voltage above which an input pin (or an I/O pin acting as an input) will detect logic '1'.   'min. V_IH' (or 'V_IH(min)')  refers to the *MINIMUM* voltage at which all (undamaged) chips of the specified type will *ALWAYS* detect logic '1'.  It may or may not depend on the Vcc of the chip in question.  if it does, it will be expressed as a proportion or percentage of Vcc or an expression involving Vcc, or as a list of values for varous Vcc ranges.

Thanks, again I missed some basics. From what I understand, this V_IH has nothing to do with the power supply, but with the pin outputs from MCU, is that correct? On the other hand, V_OH has a minimum of 2.4V, does that mean that the MCU pins connected to the I/O0~7 would receive at least 2.4V when they are READING from the rom chip? And then I need to check whether that is sufficient for a "1" signal for the MCU pins.

If interfacing a 5V supply logic IC with a 3.3V MCU with 5V tolerant pins, its usually the other way around - you need to check if the 5V logic IC will 'see' the near 3.3V logic high from the MCU as logic high.   Its extremely unlikely that a 5V logic IC wont have a high enough output level to meet a 5V tolerant 3.3V MCU's  min. V_IH threshold voltage.  As I noted above, that's OK this time.  However as the AT28C16 datasheet says 'min. V_OH (@I_OH=-400uA)' is 2.4V then yes you *SHOULD* check it against your MCU's min. V_IH  for its 5V tolerant pins.

N.B. its quite common for a MCU to have different input threshold voltages for specific types of pin, and for them to vary with supply voltage.  Make sure you are reading the correct V_IH line in the datasheet!

Thanks! Sorry a couple of follow-up questions:

1. I checked the V_IH of the GPIO pins (page 1360) and the minimum is 0.65 * V_dd. I was confused by the value of Vdd initially because I know the USB powers the launchpad at 5V but in the datasheet it mentions a Vdd_max as 4V. Then I realized there is a 3.3V regulator somewhere in the launchpad so that must be its working. If Vdd = 3.3V, then V_IH of the GPIO pins needs to be around. So the 2.4V minimum provided by the EEPROM output is quite enough.

2. Is there a book/app note that describes all these concepts? I'm thinking about explanation of basic symbols and concepts in every datasheet. I can Google around for each of them but would be nice to have a book to look into.

[Ian.M]

1: Good.  I thought so, but now you *KNOW* its OK.
2: Unfortunately I learned this stuff a *LONG* time ago in the days before the WWW, mostly from data books and trade magazine articles, + the comments of a couple of 'greybeard' mentors, so I haven't got the foggiest what resources are available today that are worth the time to study them.  You should probably ask that as a separate question.

[markusz]

1: Good.  I thought so, but now you *KNOW* its OK.
2: Unfortunately I learned this stuff a *LONG* time ago in the days before the WWW, mostly from data books and trade magazine articles, + the comments of a couple of 'greybeard' mentors, so I haven't got the foggiest what resources are available today that are worth the time to study them.  You should probably ask that as a separate question.

Thanks a lot! I'll send a new post if I cannot find enough material on line. I found one document "Understanding and interpreting standard-logic data sheets" which looks promising at the moment.