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| Combined MLCC |
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| Koen:
Hello, if reference designs often call for 2.2uF bulk then 0.1uF bypass and as all smd parts tend to become tinier, is there such a thing as combined MLCC ? Both values in the same part. I noticed 'stacked capacitors' but these were gigantic. Thank you, Koen |
| kony:
X2Y and feedtrough designs will do what you are after decoupling or filtering wise. |
| T3sl4co1l:
Yes, it's called using the one part and forgetting about anything else! ;) Such appnotes never provide an actual explanation of what they are doing, with proof that it works. I've never seen a PDN (power distribution network) analysis in one. Sure, they'll wave their hand saying, oh, the distributed values also distribute the resonances, and something something it probably works -- but this isn't actually an explanation, because it is willfully ignorant of the fact that, when two resonators are linked together, a third antiresonance occurs, between the two, with the opposite type of resonance. In this case, two capacitors together -- each one series-resonant at some frequency -- have a parallel resonance at the frequency inbetween. Parallel resonance is high impedance == more ripple voltage for a given ripple current. In short, stacking caps of different values and sizes is more likely to make things worse. Better is simply putting one or a few, modest value, small size chip caps at the device pins, and lossy "bulk" caps nearby. The loss dampens the resonance with connecting traces. An easy way to play around with this, is to build a ladder network (alternating series L and parallel-to-ground C) in SPICE. Set up reasonable source and load impedances, and adjust the inductances (corresponding to trace length: approx. 1nH/mm) and capacitor values and types to see what behaves better or worse. Tip: an 0603 size 0.1uF X7R ceramic usually has around 100mOhm ESR and 2nH ESL. Source impedance will be whatever the source is; a lot of sources have electrolytic caps, so that will dominate their output impedance (i.e., a Thevenin equivalent source with Rs = ESR). Loads are typically capacitive (power pin capacitance), some with resistance (CMOS logic should be mostly resistive, with the resistance corresponding to its average load current at the supply voltage), some with constant current (ECL logic, and most analog circuits), some with negative resistance (DC-DC converters -- don't forget to include their input capacitance and parasitics, too!). The most important, most general truth to discover: the resonant impedance is Zo = sqrt(L/C), and the resonant frequency is Fo = 1 / (2*pi*sqrt(L*C)). The Q factor is ESR/Zo, or Zo/ESR, depending on if it's parallel or series resonant. In short: for a well-damped supply, you need ESR on part with Zo, and you need both on par with the required ripple response (change in load voltage divided by change in load current = maximum supply impedance as seen by the load). Tim |
| dmills:
The other major takeaway is that some ESR is NOT a bad thing, to the point that you can actually buy MLCC parts with specified (and somewhat high) ESR precisely because they are often better behaved then the very low ESR parts that are more commonly seen. An MLCC with say 0.1 ohms of ESR is going to cause you far fewer resonant problems then one with a few mOhms ESR simply because on aggregate the Q will be very much lower. Regards, Dan. |
| PointyOintment:
I guess it's worth pointing out that if you want to increase the ESR, but can't find a cap of the right value with higher ESR (or it's too expensive), you can just put a resistor in series with the capacitor. |
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