Hello,
If the requirements are 5v input (constant, no sag at any current) and the output 12v at 300ma, the design looks very marginal no matter what you do.
We have to remember that the peak current is related to the output power and input and output voltages. The ideal duty cycle is related to the input and output voltage, and the peak current is related to the output power and the duty cycle, along with the efficiency. The efficiency plays a role too as it may only be 85 percent or even less.
The transistor drop could be as high as 1v maybe even higher. The drop across Rsc could be roughly 0.4 volts. We end up down to maybe 3.5v effective input voltage if that. If the duty cycle was 0.58 in the ideal case, it will have to be even much less which drives the peak current up even higher. It seems like the limit of 1.5 amps just may not be enough.
We haven't even looked at the minimum duty cycle given the limitations of a boost circuit with resistive losses, which may be greater than that required to get the right output, if that was even possible.
The 22uH did not sound high enough for this device right off the bat. If anything, maybe 250uH or greater.
We should go over this design more carefully. With all these limitations I'd be surprised if this ever works with the given input/output requirements. I guess there is a chance that things are not as bad as they read from the data sheet, but one build may work while the next one fails.
A good, simple simulation may help decide also.
So ok, 22uH is definitely out. Probably 100uH min, but the startup surge is going to be too high and may cause a problem. 200uH would be much better. 20uf output cap, 1000uf low ESR input cap. This might just work.
A drawback with this chip is not only the use of internal bipolar transistors, but also no slow start that came in with more modern chips. No slow start means higher input startup surge current and higher output surge voltage at startup.