Connections between Ethernet PHY and Switch

[Freshman]

I am having this Ethernet PHY - LAN8840 (https://ww1.microchip.com/downloads/aemDocuments/documents/UNG/ProductDocuments/DataSheets/LAN8840-Data-Sheet-00004727A.pdf) and this Ethernet Switch - KSZ9567 (https://ww1.microchip.com/downloads/aemDocuments/documents/UNG/ProductDocuments/DataSheets/KSZ9567R-Data-Sheet-DS00002329.pdf)

I want to use RGMII interface between them. Port 6 of KSZ9567 is RGMII between KSZ9567 and LAN8840.

So, I want to know how to connect the Tx and Rx of the devices in this interface.

Since, for RGMII, there's no concept of MAC and PHY, since RGMII is Source synchronous interface, I am confused.

I checked in the HW Checklists of both the device. Links: KSZ9567(https://ww1.microchip.com/downloads/aemDocuments/documents/UNG/ProductDocuments/DesignChecklist/KSZ989x-KSZ956x-KSZ9477-Hardware-Design-Checklist-00004151.pdf) and LAN8840 (https://ww1.microchip.com/downloads/aemDocuments/documents/UNG/ProductDocuments/DesignChecklist/LAN8840-HW-Design-Checklist-DS00004680.pdf).

On the figure on Page 10 of the LAN8840 checklist, the connections between the LAN8840 PHY and MAC device is Tx to Tx and Rx to Rx.

Whereas, on page 19, Figure 8.4 on the KSZ9567 checklist, the connections between the KSZ9567 and LAN8840 (PHY pin definition - I took this figure because LAN8840 is a PHY), is Tx to Rx.

Both seem to conflict. Can someone tell me which is the correct method of wiring the Tx and Rx between the devices?

Going through this Eval board's RGMII interface - KSZ9477 (https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/ProductDocuments/BoardDesignFiles/EVB-KSZ9477EvaluationBoardSchematics.PDF), It is wired Tx to Tx and Rx to Rx.

Also, When you see the pin buffer type of RX pins of both the devices, they seem to indicate that Rx pins are output pins and have output buffers in both the devices.

So, shouldn't it be Tx to Rx connections between the LAN8840 and the KSZ9567 devices?

Totally confused. Can someone clarify?