Divide by 2 instead of divide by ten. Much simpler with the logic, as there is only one pin to decode. With divide by 10 you need to decode a few pins to get the terminal count and use that to reset the counter.
As to ripple counters having issues, it is only if you are using them and decoding the outputs, which can very briefly have invalid counts as the counters change state, the count ripples down the chain from the fastest to the slowest. Only an issue if you are latching the outputs, if you are going to just decode to get the TC to reset you just add a RC delay to the comparator output to both ignore these very short duration pulses and to get a long enough reset pulse so the counters are going to be reset correctly ( nothing worse than having half the counters being reset by a too short pulse, it just needs to be less in time than a half of your clock, at 32kHz that will be pretty long).
If you are using a clock crystal drive it with a 4007 uncommitted gate, there is a 32kHz oscillator in the appnotes that has both low drift and low drive so it has best accuracy.
Otherwise just take a clock module and power it off 1V5 from a red LED, and use the drive pulses to clock a pair of 4017 chips arranged as a divide by 3 and the other as divide by 10 ( no jumpers at all) and use either the carry out to give a 15s pulse or one of the count outputs to give a 3s clock.