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Counting Number of Set Bits / TMDS / DVI on FPGA

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I wanted to figure out how many bits were set in an 8 bit number. If you haven't guessed, this is for a TMDS encoder for DVI/HDMI.

Just looking for tips/advice to see if I'm doing this all right. In the boxes is the logic itself (each stage determines a bit value for the number of 'set' bits), below is TMDS specific logic for deciding whether or not to use XOR or XNOR.

This is meant for an FPGA by the way.


For 8-bit values, you may be better off just using block RAM as a look up table. I would test both approaches and see which achieves timing, though BRAM would probably be simpler to implement and faster than combinatorial logic.


--- Quote ---This is meant for an FPGA by the way.

--- End quote ---
Thank goodness for that.

If you have some RAM why not just to a lookup table?

EDIT: Oops, joelby beat me to it, that'll teach me to have dinner after loading the post and before responding :)


I'd also say use RAM. It's such a small amount of RAM that distributed RAM would do the trick. With combinatorial logic, it's easy to make mistakes and miss timing requirements.

If the guaranteed 1-cycle penalty incurred by using an instantiated ROM LUT isn't a big deal, I'd go that route, as everyone else has suggested.

What FPGA do you intend to use btw?


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