Author Topic: Critique my power supply design  (Read 642 times)

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Offline prosper

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Critique my power supply design
« on: January 13, 2022, 06:01:40 pm »
I watched Dave's video series on designing a power supply, and I nabbed a few of his ideas to create this.

Design goals:
  • Does not require me to order new parts - uses jellybean stuff I have in my bin. I'm using an AMS1117, but an LM317 should work too
  • Provide 1.25V to about 5V output, at up to ~700mA from a 6V-12V battery pack.
  • Dropout voltage of 1.5 - 2V is tolerable.
  • Provides CC mode and automatically decrease the output voltage as necessary
  • Overcurrent protection - shut down and latch 'off,' with a reset button to restart
  • High precision NOT required
  • My main use case only requires a few volts drop, so, a linear converter is preferred
  • Quiescent current isn't a huge concern. Tens of mA is acceptable.
Nice-to-haves:
  • Adaptable to voltage control of voltage/current (from a uC DAC / PWM)
  • 1V = 1A current feedback voltage (so that I can connect a voltmeter to that node, and measure output current)



Analysis/notes:
  • U2A is a differential amplifier that measures the drop across R1 for current measurement/feedback
  • U2B provides a reference voltage to program the LDO output; there's a 1.25V offset voltage due to the regulator used. [The R6/R7 feedback network values provide for ~1.25V to 10V output as specified.]
  • U2C drops the feedback voltage to the LDO if the current exceeds a set threshold
  • U2D cuts off the output if the current exceeds a set threshold. [I should think about adding a delay, so that small transients don't trigger OC]
  • The resistor network on Q1 is to ensure that its base voltage is just slightly lower than Q5's - so that the CC LED comes on *just* before current limit mode is engaged. Q5 is an emitter follower, to maintain a low input impedance and reduce the load on the rest of the feedback network
  • Q4 is a low-side switch, because I don't have a negative rail necessary to control a PMOS on the high side ( V(source) may be as low as 1.25V on an output PMOS ). (Perhaps I could implement a PMOS device before the LDO Vin pin... but low-side switching is acceptable)
  • Q2/Q3 could potentially be replaced with 3904's to reduce the number of unique components in the design
  • No polarity protection is currently provided
  • An LM324 cannot approach the positive rail input or output. This circuit therefore can only approach (+BATT - 1.5V )
  • An LM324 has very weak current sink capabilities near gnd, so R5+RV2+R10 must be as large as possible.


My prototype seems to work as expected, but I'm interested in getting feedback on any obvious mistakes I've made, or optimizations/simplifications I could implement. Or anything else, really even just on my schematic drawing techniques
« Last Edit: January 13, 2022, 06:04:01 pm by prosper »
 

Offline David Hess

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Re: Critique my power supply design
« Reply #1 on: January 13, 2022, 07:25:36 pm »
Some simplification is possible.  U2A and U2C can be combined by moving the current error amplifier to the high side.  See the example below.  Combining these functions also improves performance and makes frequency compensation easier.

Over-voltage tripping is more common than over-current tripping, and would commonly be done with an SCR crowbar on the output instead of disconnecting the output.

Taking voltage feedback from the adjustment pin is less precise.  Taking feedback from the output removes noise and errors from U3.

The transconductance and therefor voltage gain of Q1 varies significantly with operating point, so the current control loop is going to be difficult to frequency compensate.  More often Q1 is replaced by a diode so that the current error amplifier directly pulls the control signal down as shown below.

C2 and C3 slow the response of the current and voltage control loops.  The example below is optimized for fast response although much faster than commonly needed.
 

Offline prosper

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Re: Critique my power supply design
« Reply #2 on: January 13, 2022, 08:28:13 pm »
Taking voltage feedback from the adjustment pin is less precise.  Taking feedback from the output removes noise and errors from U3.

I'd actually considered that. Taking feedback from the output would also make the use of an LDO more or less redundant, and I could instead use a big BJT as the pass element. Doing THAT might also allow me to remove the overcurrent shutdown components, as I could just shut off the pass element
 

Offline David Hess

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Re: Critique my power supply design
« Reply #3 on: January 14, 2022, 11:23:00 am »
Taking voltage feedback from the adjustment pin is less precise.  Taking feedback from the output removes noise and errors from U3.

I'd actually considered that. Taking feedback from the output would also make the use of an LDO more or less redundant, and I could instead use a big BJT as the pass element. Doing THAT might also allow me to remove the overcurrent shutdown components, as I could just shut off the pass element

The LDO is still useful for its built in over-current, thermal, and safe-operating-area protection.  Also unlike a bipolar transistor, the LDO draws a low and consistent bias current through its adjustment pin.

The disadvantage of the LDO is its poorly specified dynamic performance which makes designing the frequency compensation within a feedback loop more difficult, however in practice this is not a problem.
 


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