Crystal Oscillator Circuit

[Benta]

meh

[orolo]

meh

Charming. Anyway, I'll try to get some time to build 32768 crystal oscillators with Pierce + 74HC04, the two inverter version, and Pierce + 74HCU04. I want to test if the first circuit doesn't work, the second explodes, and the third works. After a lot of spice time with them, I find the three variants very intriguing.

[Benta]

meh

Charming. Anyway, I'll try to get some time to build 32768 crystal oscillators with Pierce + 74HC04, the two inverter version, and Pierce + 74HCU04. I want to test if the first circuit doesn't work, the second explodes, and the third works. After a lot of spice time with them, I find the three variants very intriguing.

Go ahead and have fun. I've built dozens of these with HC04, HCT04, HCU04, 4049, 4069 etc.
They always work if you remember to limit the drive (220...470 kohms in series with the crystal), bias the inverter with a few Mohms and use the right load capacitors for the crystal (there are two flavours of 32 kHz parts on this parameter).

Where you can go wrong is using an HC14 or another Schmitt trigger gate. It won't work.

Mind you, we're not talking chronometer precision here, for that there are other solutions.

[Beamin]

Hi all. Sorry if I'm late to the party.

I'm also doing the same assignment as what OP is doing and from the awesome advice in this thread I designed an oscillator with a 77.5kHz resonant frequency. I got the design from this link: http://endorphino.de/projects/electronics/timemanipulator/index_en.html.

Please can you let me know if there is anything that I can change in the design to get a more clean output. Thanks!

Also the spice model that was linked above has a VCC of 9V. We only have access to rails of 5V and 0V respectively with a "virtual ground" of 2.5V.

That time machine thing is quite an impressive build. Looks like it is an actual piece of test equipment.

[Zero999]

meh

Charming. Anyway, I'll try to get some time to build 32768 crystal oscillators with Pierce + 74HC04, the two inverter version, and Pierce + 74HCU04. I want to test if the first circuit doesn't work, the second explodes, and the third works. After a lot of spice time with them, I find the three variants very intriguing.

Can't you get hold of a 75kHz crystal?

Digikey has them and ship to Spain but I suppose it's not worth it, unless it's part of a large order.
https://www.digikey.com/product-detail/en/citizen-finedevice-co-ltd/CFV-20675000DZFB/300-8851-ND/5970255

[orolo]

Go ahead and have fun. I've built dozens of these with HC04, HCT04, HCU04, 4049, 4069 etc.
They always work if you remember to limit the drive (220...470 kohms in series with the crystal), bias the inverter with a few Mohms and use the right load capacitors for the crystal (there are two flavours of 32 kHz parts on this parameter).

How about clipping the output of the second gate using 100k and then two diodes coupled by a capacitor? A bit complicated, but at first it seems promising to take the power under 1uW.

Can't you get hold of a 75kHz crystal?

Digikey has them and ship to Spain but I suppose it's not worth it, unless it's part of a large order.

I'm not planning a big enough order just now. On the other hand, I've some 100kHz tuning fork crystals I could use instead of the 32k crystals. I guess these are more equivalent to the 75kHz case.

If I get the time, I'll try tomorrow the two gates circuit @ 100kHz. I expect Benta to be right and the crystals not surviving a long time the drive of the circuit: in the simulation, the power at the crystal grows almost linearly for 0.3 seconds, way past 1uW. I wonder if with some kind of limiting it will get better.

[Beamin]

How exactly do you get a signal out of the crystal its not as it has inputs and out puts. You apply DC to it and does it act like a capacitor sort of? Or along with your DC do get a tiny oscillation along with it? If you look at the first two circuits one has the xtal in between the op amps the other is before it. Why do both of these work?

[Zero999]

How exactly do you get a signal out of the crystal its not as it has inputs and out puts. You apply DC to it and does it act like a capacitor sort of? Or along with your DC do get a tiny oscillation along with it? If you look at the first two circuits one has the xtal in between the op amps the other is before it. Why do both of these work?

A crystal is just a resonator. It can be modelled as a resistor + capacitor & inductor in series, with another shunt capacitance in parallel, as has been shown in the LTSpice schematics posted previously. Look it up using a search engine.

[pietergoos]

I spoke to the lab manager, we are allowed to use the NOT gates that they have in stock, however, they only have 74HC04 and 74HCT04 available.
Hence, I'm going to be trying it with the HC04, it seems like a better bet from what everyone is saying!

[Ian.M]

Attempt to bias a single gate of the 74HC04 inverter into its linear region with negative feedback and see if you can get stable, linear x20 inverting gain with reasonable amplitude.  For the purposes of this experiment assume that a 74HC04 gate is equivalent to a very fast OPAMP, with its +in internally tied to Vcc/2.     Tie all other gate inputs low for now.

The capacitance at the gate input must be as low as possible - if its time constant with the feedback resistor is greater than the propagation delay it will probably form a RC oscillator.  Start with just the feedback resistor, and check the output is near Vcc/2, and isn't oscillating, using a good x10 probe on a scope with 100MHz or better bandwidth.  Then add an input resistor and a small coupling cap, and check it still isn't oscillating with the other side of the coupling cap grounded.  Then apply a  sinusoidal test signal and check it amplifies as expected.   If all is good, you've got a gain stage that can be used in any of the oscillator circuits that have been suggested. 

If you cant get stable amplification, you'll need to go for an OPAMP for the oscillator itself followed by a chain of 74HC04 gates to square it up.   In that case, capacitively couple the OPAMP output to the 74HC04 input of the first gate, and bias the gate input with a 10K pot with 10K end stop resistors connected as a potential divider between Vcc and Gnd.  Adjust for 50% duty cycle at the output of the chain of gates (or use a 2.2K resistor and a 0.1uF cap as a low pass filter and adjust for an average output of Vcc/2 on a DMM).  As you've got six gates in the package, you may wish to parallel multiple gates at the output for more drive capability.

[Zero999]

A single 74HC04 gate is buffered, therefore is really three CMOS inverters connected in series. If the input is connected to the output, via a resistor, it will form a ring oscillator, if you're not careful. I wonder if a small capacitor connected from the input to output, in parallel with the feedback resistor will help to prevent oscillation?

[Ian.M]

NXP have component level 74HC/HCT SPICE models here: https://assets.nexperia.com/documents/spice-model/hc.zip  The 74HC04 model is defined solely in terms of MOSFETs and passives.

I've extracted the 74HC04 model with PDIP-14 package parasitics and its prerequisites and patched them together in one file for LTspice.

Use with the LTspice opamp2 symbol.  Do not connect the +in.
Set the value to 74HC04 and include the model by:

Code: [Select]

.lib 74HC04P.sub
NXP 74HC04 datasheet: https://assets.nexperia.com/documents/data-sheet/74HC_HCT04.pdf

@Hero999:  Yes, the dammed thing oscillates - *FAR* too much gain!  Getting it stable and in its linear region is not so simple.

@pietergoos,
Unless they have 74HCU04 or 74HC04U, *DON'T* waste your time trying to use negative feedback round a 74HC04!

Are there any discrete transistors, JFETs or small signal MOSFETs available?
 

[floobydust]

Similar circuits and discussion here: https://www.eevblog.com/forum/projects/low-jitter-100khz-oscillator-for-ad/msg1304001/#msg1304001

[pietergoos]

Just an update from my side, I managed to build the circuit shown in reply 19, this worked very well and is now implemented in my circuit.
Thank you to all for the help, I'll attach an image of the resultant wave.
Many thanks to all who've helped!

[Ian.M]

Unfortunately the reply#19 circuit may overdrive the crystal significantly which can result in frequency errors and early crystal failure.  Check your crystal's datasheet for the maximum permissible drive power.

In LTspice, when its reached steady state, plot the power in R2 by alt-clicking it, and average it over about 10ms by selecting that range on the plot then ctrl-clicking the waveform title.  For the original reply#19 circuit, it will be about 10mW.   To reduce it  to about 1mW, insert a potential divider, 1K upper arm and 330R lower arm between U2 output and the crystal.

In real life, to measure the drive power see https://www.idt.com/document/apn/830-quartz-crystal-drive-level

[floobydust]

I think you mean 330kohm there, like this slide.
I've never had success measuring LF crystal oscillators.
That app note uses Tektronix CT-6 AC current probe, about $750 and using a JFET seems to miss the phase-shift, so very difficult to measure actual crystal drive power.
Watchmakers use an inductive pickup for frequency, I should make that someday.

NC-38 32.768kHz tuning fork crystals seem to be around 1uW max. drive level. That is very tiny drive.

[Ian.M]

No. the reply #19 circuit is the two inverter type

The crystal has 5V peak to peak drive on one side and the other side sees the 30K resistor that's part of the feedback network to the first gate input.   You cant increase the 30K resistor significantly without causing the gates to toggle at an integer fraction of the crystal frequency so the only option is to reduce the drive level by reducing the drive voltage.   You *COULD* run the inverters at 2.5V Vcc, but if you need 5V logic compatibility, its simpler to put a fairly low impedance potential divider between the second gate output and the crystal.

[orolo]

Okay, at last I managed to get some time to prove that circuit #19, with some common sense, needs not overdrive the crystal at all.

The idea is to add a couple of Schottky diodes to limit the drive to the crystal.

For a mathematical proof, the diodes will limit the drive into the crystal to a 200mVpp square wave. If we couple that drive to the first mode of the oscillator, we get the steady state excitation of the crystal. In voltage terms, it amounts to \$\frac{2}{\pi}V_{e}\frac{R_l}{R_s + R_l}\$, where Ve is the square wave excitation, Rs the series resistance of the crystal, and Rl the load resistance. In our case, the load resistance equals the series resistance, so the sinusoidal amplitude in the crystal reduces to \$V_e/\pi\$. The power dissipation is \$P \ = \ \frac{V_e^2}{2\pi^2R_s}\$ which, taking Ve=200mV and Rs=33775 Ohm, gives P = 0.33uW. Not bad. LTSpice is more optimistic and predicts about 0.2uW.

I've built a quick version of this circuit, and it works, but with quite a few parasitics. I think the problem is the layout; if the diodes are removed the parasitics remain. In fact, the circuit self oscillates without crystal.



In the picture I'm using a 100kHz crystal. I've also tested the circuit with a 32kHz crystal. I attach traces for the 100kHz oscillation, the 32kHz oscillation, and a trace of the schottky section at 32kHz. The RMS square wave is 163mV RMS, so the drive to the crystal is very soft.



I can improve the oscillator to make it cleaner, but think this goes a long way proving that the two inverter topology needs not overload the crystal if done right.

Sorry about the delay answering this. I've have had a long, hard week.

[Beamin]

Okay, at last I managed to get some time to prove that circuit #19, with some common sense, needs not overdrive the crystal at all.

The idea is to add a couple of Schottky diodes to limit the drive to the crystal.

For a mathematical proof, the diodes will limit the drive into the crystal to a 200mVpp square wave. If we couple that drive to the first mode of the oscillator, we get the steady state excitation of the crystal. In voltage terms, it amounts to \$\frac{2}{\pi}V_{e}\frac{R_l}{R_s + R_l}\$, where Ve is the square wave excitation, Rs the series resistance of the crystal, and Rl the load resistance. In our case, the load resistance equals the series resistance, so the sinusoidal amplitude in the crystal reduces to \$V_e/\pi\$. The power dissipation is \$P \ = \ \frac{V_e^2}{2\pi^2R_s}\$ which, taking Ve=200mV and Rs=33775 Ohm, gives P = 0.33uW. Not bad. LTSpice is more optimistic and predicts about 0.2uW.

I've built a quick version of this circuit, and it works, but with quite a few parasitics. I think the problem is the layout; if the diodes are removed the parasitics remain. In fact, the circuit self oscillates without crystal.



In the picture I'm using a 100kHz crystal. I've also tested the circuit with a 32kHz crystal. I attach traces for the 100kHz oscillation, the 32kHz oscillation, and a trace of the schottky section at 32kHz. The RMS square wave is 163mV RMS, so the drive to the crystal is very soft.



I can improve the oscillator to make it cleaner, but think this goes a long way proving that the two inverter topology needs not overload the crystal if done right.

Sorry about the delay answering this. I've have had a long, hard week.

How do you get the formulas to come up on a forum? I have only been able to copy/paste them which is a pain.

[orolo]

Put your LaTeX equations betwen \ $  and \ $.
See these older threads:

https://www.eevblog.com/forum/chat/$latex$-instructions/msg867803/#msg867803

https://www.eevblog.com/forum/suggestions/latex-for-eevblog/msg864707/#msg864707