Thank you both for the explanation.
What happens now when at boot time another EEPROM is connected to the FX2LP at 0xA0 ?
Now it gets complicated:
I modified VID/PID in the EEPROM on 0xA2 which is read during the boot sequence and my PC reconizes it as the device for which I modified the IDs.
When another EEPROM (holding no valid VID/PID so no C0 or C2 mode triggered) is connected the VID/PID from the FX2LP "internal storage" is used, not the one from the EEPROM.
Just like no EEPROm was found at all.
I built this tool
https://www.hexefx.com/diy/utility/fv1prog to access the EEPROM of another device that is tied to 0xA0 to write some DSP code to the second EEPROM.
There it is stated that the FX2LP searches at boot time for an EEPROM on 0xA0 and 0xA2. That's the reason why there is a daughter board that connects the second EEPROM on the external device on 0xA0 by controling a 4066 IC via an interrupt IE0 (SUDAV).
FX2LP --> read VID/PID from onboard EEPROM 0xA2
|
connect after boot sequence via 4066
|
v
external device with EEPROM on 0xA0
So far it works perfectly as intended. But when I keep in mind that the FX2LP only looks at 0xA2 as it is mentioned in the datasheet and was confirmed here then why is it a problem when during boot time a second EEPROM is connected to 0xA0 ?
I jumpered the SCL/SDA relevant pins on the 4066 to have the second EEPROM directly connected without the 4066 in between to verify the problem.
Don't get me wrong, I don't want to bother anyone neither you nor the guy who came up with the idea to isolate the second EEPROM during boot time but I want to understand why it is like that.
Edit: I also connected the second EEPROM on a breadboard to the FX2LP not only via the external device to avoid multiple masters but it is the same issue.