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Electronics => Beginners => Topic started by: stcoso on May 29, 2020, 10:10:11 am

Title: DC loading a gate driver
Post by: stcoso on May 29, 2020, 10:10:11 am
Hi to everyone. I'm asking.. how bad would it be drawing a constant DC current from a gate driver?

Let's take for example an LMG1025 GaN driver ( https://www.ti.com/lit/pdf/snosd74 (https://www.ti.com/lit/pdf/snosd74) ) . It has 7A/5A output capabilities for charging/discharging Cgs.. but would it be able to  withstand a (let's say 100mA) continuos current?
Title: Re: DC loading a gate driver
Post by: exe on May 29, 2020, 10:40:50 am
Why do you need this?

Anyway, I'd ask TI for this.

Looking at the structure in the datasheet, I'd say it should, but this is not spec'd in in an obvious way. I'm only guessing from the estimated Rds(ON) of the upper mosfet that it will be fine. The datasheet mentions this:

> LMG1025-Q1 can also be used as a high frequency low current laser diode driver.

But it doesn't tell how much current it can provide.

It also says that: for this condition "IOUTH = 100 mA, IN+= 5 V, IN- = 0 V, VDD = 5 V" the dropout is 52mV max. So, they at least allow this current in this test.
Title: Re: DC loading a gate driver
Post by: stcoso on May 29, 2020, 12:54:54 pm
Basically, it would be very handy for driving fast an LED.
 
At the moment i use a current sink (fast opamp followed by an N-ch LDMOS). This topology is not able to sweep charge carriers at turn off (high impedance when input signal goes to 0)... so very good rise time and orrible fall time.

I was designing a new driver around GaN FET using a different topology (attached schematic) to achieve fast pulse and it would probabily work fine for very short pulses and i was happy about it.. but then needs changed. I need square (optical) pulses of arbitrary lenght with fast rising/falling edge. With that topology longer pulses means inefficiency and/or worse edges (trade offs in the RL sweep section). 

So then.. the first thing i thought was swapping the Nch LDMOS that i'm currently using with a single stage of complementary pair of BJT in push pull... but i couldn't find any parts that would work (ft high enough). Even worse going CMOS. It's really likely that i'm searching in the wrong place  ;D but still...


So then.. back to the gate driver. Voltage output is fine (Vf of the LED= 3.8V), it has the peaking capabilities to drive capacitive loads (my led Cj is 500pF). I would lose the possibility to vary the LED current without swapping the current limiting resistor (but that is fine).


Would be nice to find a complementary pair of BJT...  The last resort would be using an half bridge topology with a pair of fast n-ch MOS with a suitable driver.

Title: Re: DC loading a gate driver
Post by: exe on May 29, 2020, 01:34:30 pm
I'm not sure what you call "complementary pair of bjt". You can take any reasonably fast bjts, such as bd139/bd140, or 2N2222 and 2N2907. I don't know how fast they can be driven and how fast you need, but you can check performance in, .e.g., LT Spice. Bear in mind they may need, say, a resistor from base to ground to switch them - off quickier. It may also need biasing to eliminate, uhm, "crossover distortion" that may limit the speed. Or may be not, idk.

Or n-mos/p-mos push/pull with small fets so you don't need to be bothered too much about gate capacitance and can drive them directly. Something with gate capacitance below 100pf, for example.

May be there are also dedicated ICs for what you are doing. It's not the first time people ask for fast led driver. It's worth searching the forum.
Title: Re: DC loading a gate driver
Post by: stcoso on May 29, 2020, 01:52:28 pm
With complementary pair i mean matched NPN and PNP transistor top use in a push-pull configuration (as you've probably already intended ;D ) to boost the op amp sourcing/sinking capabilities. Am i calling them wrong  :-\  ? The problem is finding a suitable PNP bjt...


Title: Re: DC loading a gate driver
Post by: exe on May 29, 2020, 02:03:26 pm
What's wrong with bd139/bd140? Or 2N4401/2N4403?

Why are they should be matched? Matching is normally needed for amplifiers to make waveforms distorted symmetrically, imho. I'm not sure this even make sense to closely match when there is a strong negative feedback.

Just in case, in the driver you showed transistors are obviously not matched, look at "Output DC Characteristics".
Title: Re: DC loading a gate driver
Post by: stcoso on May 29, 2020, 02:09:51 pm
The pair you mentioned have too small fTs... And no, they do not need to be matched.


EDIT:looking again at mouser i may be very wrong with the possibility of finding suitable FETs ;D
Title: Re: DC loading a gate driver
Post by: exe on May 29, 2020, 02:31:55 pm
The pair you mentioned have too small fTs...

How much do you need?
Title: Re: DC loading a gate driver
Post by: stcoso on May 29, 2020, 02:36:46 pm
Well.. something around 1GHz of ft.

A fast CF op amp could provide 500mA. I'm trying to achieve rise/fall time <2.5ns. At turn on/off i need to be able to provide +-3/4A.

Title: Re: DC loading a gate driver
Post by: exe on May 29, 2020, 06:32:44 pm
Oh, can't help with that, I have no experience with such fast circuits.

BTW, what's you signal source?
Title: Re: DC loading a gate driver
Post by: Weston on May 29, 2020, 06:49:51 pm
Gate drivers make pretty good general purpose high power / high speed buffers. The only thing you have to be wary of is the output structure. Some gate drivers use a "booster" pull up that is only actuated for a short period of time, so the DC output resistance is higher than would be expected from the peak current listed in the datasheet. The LMG1025 does not have this structure.

Other than that, you are mostly going to be limited by thermal issues, and the LMG1025 part has an over temp cutout.

I used the LMG1020 (I think the LMG1025 is just a minor rev / different package variant) in this design for resonant gate drive at 40.68MHz, where it is driving an inductive / resonant load and it worked great.  http://superlab.stanford.edu/rfchallenge.html (http://superlab.stanford.edu/rfchallenge.html)
Title: Re: DC loading a gate driver
Post by: stcoso on May 29, 2020, 06:55:14 pm
As of today i'm using a signal generator... so 50Ohm impedance.  It's not fast enough (5ns rise/fall) but for experimenting it's okay considering that i can easily reach 7ns (optical) rise time and 120ns fall  ::) with the current topology (current sink with op amp driving Nch LDMOS) :-DD.


In the circuit i'm designing i would probabily use a (buffered) Si5351 controlled via i2c.

However I asked in the TI forum... they said "1025 is not meant to drive the LED directly without a FET. However with some testing and validation, under certain operating conditions this could be possible. However like you said, thermals would be the limiting factor here."


Another possibility is paralleling opamps (with some level of isolation between them)... but it's something that scares me. I've red so many constrasting opinion in this topic that i don't really know if it's worth the time exploring the possibility.
Title: Re: DC loading a gate driver
Post by: stcoso on May 29, 2020, 07:01:44 pm
Gate drivers make pretty good general purpose high power / high speed buffers. The only thing you have to be wary of is the output structure. Some gate drivers use a "booster" pull up that is only actuated for a short period of time, so the DC output resistance is higher than would be expected from the peak current listed in the datasheet. The LMG1025 does not have this structure.

Other than that, you are mostly going to be limited by thermal issues, and the LMG1025 part has an over temp cutout.

I used the LMG1020 (I think the LMG1025 is just a minor rev / different package variant) in this design for resonant gate drive at 40.68MHz, where it is driving an inductive / resonant load and it worked great.  http://superlab.stanford.edu/rfchallenge.html (http://superlab.stanford.edu/rfchallenge.html)

That link is porn for my eyes.  :-[ :-[ :-[ :-[


Thank you for the hint however  ;)


EDIT:LMG1020 is WCSP,  LMG1025 is WSON6 . I've attached the thermal informations. Correct me if i'm wrong here... LMG1020 has a worse Junction-to-ambient thermal resistance but a fairly low Junction-to-case... that can be useful in combination with a heatsink

Title: Re: DC loading a gate driver
Post by: Weston on May 29, 2020, 10:46:13 pm
Having basically no case and being an exposed die, the LMG1020 will have a lower junction to case resistance. Figuring out a reliable heatsink interface to suck an appreciable amount of power out would be very difficult though.

Your best bet would probably be the LMG1025 with well optimized thermal pad. I don't think you are going to be able to dissipate more than a watt or so from one of these gate drivers either way. Even that may be a bit optimistic.

Another option would be to use one of these gate drivers to drive a GaN FET. I think thats how a lot of the high speed laser drivers for Lidar work nowdays https://epc-co.com/epc/Products/DemoBoards/EPC9126.aspx

This would have an advantage of not having a UVLO, so you can vary the diode current by varying the supply current.

Title: Re: DC loading a gate driver
Post by: stcoso on May 29, 2020, 11:57:30 pm
IF it's like it seems (0.45Ohm output resistance) i should be well below 1W.

The problem with the single low side N-ch FET is that it's goes high impedance when Vgs goes to 0... so i wouldn't have any charge carriers sweep-out path (and my optical fall time will go through the roof  :horse:). There are techniques that could improve the situation (the attached schematics of some posts ago uses an RL sweep-out) BUT they'll work fine only for obtaining (optical) lorentzian/gaussian pulses and/or in a very inefficient way... some months ago that seemed fine ( i've designed a driver based on LMG1020 LiDAR SNOU150 guide) but recently needs changed (i need optical square-ish wave). So back to the drawing board  :-DD

From what i red in this period my possibilities are... Using an opamp to drive a pnp/npn (or n-ch/p-ch FETs) push pull, paralleling op amps  :scared: or using an half bridge configuration with n-ch GaN(TI, OnSEMI and pSemi have half bridge GaN driver ICs)  ::)

...or i could cheat using FETs drivers directly ;D


Title: Re: DC loading a gate driver
Post by: stcoso on May 30, 2020, 11:47:13 am
I found an IC from Intersil/Renesas which seems to fit me need. Unfortunately though the datasheet is in the short form.. probably the complete one is under NDA and the part is difficult to find (seems end of life)

https://www.renesas.com/us/en/www/doc/datasheet/isl58303.pdf (https://www.renesas.com/us/en/www/doc/datasheet/isl58303.pdf)

Has 3 ganglable channel 1.2A peak each
Title: Re: DC loading a gate driver
Post by: magic on May 30, 2020, 03:18:03 pm
How much peak current do you actually need?
Would a few paralleled logic gates like 74LVC14 do it?

Rise/fall time is <1ns, output impedance is <10Ω per channel, works up to 5V.
Title: Re: DC loading a gate driver
Post by: stcoso on May 30, 2020, 03:25:55 pm
Something around 4A... the led that i'm using have 500pF Cj.. i would definitely need more than on IC to parallel
Title: Re: DC loading a gate driver
Post by: magic on May 30, 2020, 03:50:52 pm
Stupid question, wouldn't 4A result in 0.5ns discharge time with 500pF charged to 4V?
Title: Re: DC loading a gate driver
Post by: stcoso on May 30, 2020, 04:14:29 pm
500ps would be the RC constant when R=1 Ohm or a 5RC for a 0.2 Ohm BUT to enhance peaking I'll use a capacitor for charging/discharging that Cj