Author Topic: Determining Error in Voltage and Phase of AD9106 DAC  (Read 165 times)

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Offline homelykoalaTopic starter

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Determining Error in Voltage and Phase of AD9106 DAC
« on: April 02, 2025, 01:51:39 am »
I'm working with an AD9106 12-bit DAC (https://www.analog.com/media/en/technical-documentation/data-sheets/ad9106.pdf) using its EVAL-board (https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/eval-ad9106.html#eb-overview) and have it up and running with an Arduino UNO R3 (schematics attached) to produce 4 sinusoidal signals with independent control of their amplitude and phase over a bandwidth of 9Hz-2Mhz. I'm looking to determine the uncertainty in the amplitude and phase of each channel and was wondering if the following estimates are valid.

For amplitude uncertainty, I read that the main contributions are Offset Error, Gain Error, Nonlinearity Errors (DNL and INL) and Quantization error. We correct for offset and gain errors in code, so I consider those negligible. DNL and INL seem to be correlated so I only consider the INL of 0.5LSB as the larger of the two listed in the AD9106 datasheet 3.3V DC specifications (based on the schematics from the eval board).  I also read that quantization error takes the form 1/sqrt(12)LSB based on this TI Application Report (https://www.ti.com/lit/an/slaa013/slaa013.pdf). Despite this, the report seems to imply in Figure 7 that quantization error is included in total ADC accuracy but not DAC. I'm not sure why this would be the case though.

If quantization error is included, would we estimate the amplitude uncertainty as the root mean square of INL and Quantization?

Verr = sqrt((0.5LSB)^2 + LSB/12) = Vfs/1023 * sqrt(0.5^2 + 1/12) ~ 0.26mV
Where Vfs is the full scale voltage (~460mV for Channel 1) and 1023 = 2^{10} - 1 (the dac voltage control is effectively 10 bit).

As for phase, we have 16bit control to give worst case error of 0.006deg. I saw in Analog Devices AN-1067 Equation 21 that jitter, j, from the clock source could contribute to the phase error, Perr, through j = Perr/(2*pi*f), where f is the output frequency. The EVAL board seems to be clocked by an AX3DCF1 156.25MHz crystal oscillator what has j = 115fs, so we expect something like Perr = 0.00004deg at 1Mhz so that quantization error dominates.

I asked Analog Devices about these, and they mentioned that I don't account for frequency variation as shown in Figures 13-17 of the AD9106 datasheet. We are sticking to the 9Hz-2Mhz frequency range and the AD9106 is suitable for Mhz application so I was thinking our frequency response would be flat enough to ignore.

Are there other factors I should consider to calculate these uncertainties? Also, are there any standard tests I should be doing to evaluate the noise in the system.

Thanks
 


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