Electronics > Beginners
Discreet startup delay?
spec:
--- Quote from: MiDi on November 28, 2018, 11:30:13 am ---
I suggest that this [POD#4 issue01] would not work properly, the leakage of Q1ce could lead to uncontrolled turn on of mosfet.
A <=1M resistor from Q1c to Vi+ would fix this.
For improved stability I would add some couple of nF between Q3gs.
--- End quote ---
Thank you for your observations- very helpful :)
I agree with the reason for the 1M resistor between Q2eb, and it is also good design practice.
But can't understand adding a capacitor Q3gs, because there is already a relatively large parasitic capacitor there by virtue of the PMOSFETs characteristics. Also, it is quite important to turn the PMOSFET on as fast as possible to keep it in the linear region for as short a time as possible.
In fact, I am not altogether happy with the rather long turn-on time constant at the gate of Q3 in the version of the circuit for over 7V supply operation.
Decoupling capacitors etc are not shown so this is not a production circuit, but it is hopefully not far off.
By the way, there is a cigar for anyone who can find a PMOSFET to replace the PMOSFET shown with a VGSmax of 20V or greater, still with a VGth of 1V or less.
And there is a box of cigars for anyone who can find a PMOSFET with the following characteristics:
IDmax: 10A or more
RDss at 3VGS: 5mR or less
VDSmax: 30V or more
VGS: 30V or more (not essential)
Anyone had any experience of these new Nitride MOSFETs?
Zero999:
Using a zener means the delay will be dependant on the supply voltage, which may or may not be an issue.
Why not replace D3, R4, Q1 and Q2 with the TL431 and add a resistor between the output and C1, to provide the snap-on action and prevent oscillation?
spec:
--- Quote from: Hero999 on November 28, 2018, 01:22:38 pm ---Using a zener means the delay will be dependent on the supply voltage, which may or may not be an issue.
--- End quote ---
That's true of most POD circuits I have seen posted. The solution would be to fit a constant current generator. Most POD circuits are configured to suit the supply line voltage to be used and that is the intention here. But in general, I would prefer comments that are peculiar to this circuit, rather than wade through POD design in general.
--- Quote from: Hero999 on November 28, 2018, 01:22:38 pm ---Why not replace D3, R4, Q1 and Q2 with the TL431 and add a resistor between the output and C1, to provide the snap-on action and prevent oscillation?
--- End quote ---
The OP asked for a discrete POD circuit, and, anyway, a complementary transistor bi stable snaps on very fast. Nonetheless, using a T431 is an interesting idea. I have looked at the TL431 before, but the circuit would be less deterministic then. The TL431's relatively large input bias current is also an embarrassment Not sure if the TL431 approach would satisfy the 0V only dependency either. Would the TL431 still have a max 20uA Iq? Never mention oscillations and TL431 in the same sentence: the damn things oscillate for a pass time.>:(
All the same, why don't you do a TL431 POD circuit so I can have a rest and admire your work.
By the way, I thought your idea of using a relay-based POD circuit for safety-critical applications was excellent- I made a note of that.:)
spec:
Attached is the POD#4 (issue 03) schematic incorporating MiDi's 1M resistor modification
MiDi:
--- Quote from: spec on November 28, 2018, 12:59:36 pm ---But can't understand adding a capacitor Q3gs, because there is already a relatively large parasitic capacitor there by virtue of the PMOSFETs characteristics. Also, it is quite important to turn the PMOSFET on as fast as possible to keep it in the linear region for as short a time as possible.
In fact, I am not altogether happy with the rather long turn-on time constant at the gate of Q3 in the version of the circuit for over 7V supply operation.
Decoupling capacitors etc are not shown so this is not a production circuit, but it is hopefully not far off.
By the way, there is a cigar for anyone who can find a PMOSFET to replace the PMOSFET shown with a VGSmax of 20V or greater, still with a VGth of 1V or less.
And there is a box of cigars for anyone who can find a PMOSFET with the following characteristics:
IDmax: 10A or more
RDss at 3VGS: 5mR or less
VDSmax: 30V or more
VGS: 30V or more (not essential)
Anyone had any experience of these new Nitride MOSFETs?
--- End quote ---
Capacitor between Q3gs improves dv/dt rating and slows down switching (better emi), think it is not really a concern in this application, but with this high impedance at the gate, me would feel better.
Slow switching would be a problem if you get out of the soa, NDP6020P is capable of DC operation with at least 1A@Vdsmax with appropriate heatsink :-//
VGSmax of 20V or greater, still with a VGth of 1V or less - would claim it near impossible.
Maybe there are exots, but even then you would not pay the price for this application.
There is nothing bad on clamping a logic level mosfet, protection is always good idea.
If "a pmosfet" includes paralleling of devices, then I now own a box of cigars :popcorn:
You mean GaN Mosfets? Think they are used for low voltage high power rf applications.
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