Author Topic: D Flip Flop Ring Counter Multisim  (Read 5016 times)

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Offline markmckee601

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D Flip Flop Ring Counter Multisim
« on: April 04, 2015, 08:51:41 am »
Part of an assignment is to design a 4-bit counter using 4013 D Flip Flops. I've ran into an issue when I try and simulate a standard ring counter where I get a convergence error.

Ring counter:
http://www.electronics-tutorials.ws/sequential/seq_6.html

Any help and/or advice would be appreciated!
 

Offline T3sl4co1l

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Re: D Flip Flop Ring Counter Multisim
« Reply #1 on: April 04, 2015, 06:07:23 pm »
Welcome to the wonderful world of SPICE...

In short, you need to poke at the parameters in Simulation Settings.

For this circuit, you may also need to check the Mixed Sim Settings.  Which I think are just ideal vs. realistic pin models.

Even when no convergence errors are produced, the code simulator will still fuck up.  See this for example:



Everything's going along fine, oh wait, notice something missing?

...

The first lesson on SPICE should be -- and please pass this along to your instructor and/or the rest of class -- YOU AREN'T DRIVING A REAL WORLD REPRESENTATION!  YOU ARE DRIVING A MODEL!

Once you accept that, you open yourself to the fact that SPICE is a computational environment, and therefore suffers from the drawbacks of any model: convergence, numerical accuracy, sensitivity to parameters, numerical instability or oscillation (particularly in TRAP integration), nonphysical results, and the accuracy of the sub-models your circuit uses (it's very easy to get 40kV from a three-terminal LM741 model -- it doesn't include supply pins -- a five-terminal model may be better behaved, but will still miss the real article in many important ways).

Your circuit has the added complication of code models.  Digital logic is implemented by a code model (much the way logic circuits for FPGAs and stuff are described in VHDL or Verilog code), which describes events (voltage/state changes), delays, and logic functions (combinatorial and sequential).  If an event is missed (particularly when interfacing between the "analog" SPICE model and the digital code model), nothing happens, which is what happened in my screenshot above.  Sometimes, it helps to specify ideal pin models (everything stays in the code model, and states don't get corrupted...as easily).  Other times, it helps to use real models (which gives better "analog" results).  Often, you'll find you have to alternate between them as you make changes in the circuit!  (Sensitivity to parameters!)

As for your circuit: you have a DC voltage (5V) driving a diode-OR gate into a logic input pin.  1 OR X = 1, so the diodes can be removed and the 5V connected straight to the pin.  But that wouldn't be correct with the reference.  What's missing is you need to use a VPULSE, not VDC, source.  You also need a pull-down resistor so the OR result can ever become logic 0.

These changes might well fix your convergence error at the same time, but doing that without talking about what the errors are about, would be unfair.

Tim
Seven Transistor Labs, LLC
Electronic design, from concept to prototype.
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