Clock skew, clock shrinkage, phase jitter differences?

[shivajikobardan]

https://imgur.com/a/k2QaiZu

I have the book which shows the figure(but no definition and explanation). Please help me get this and their difference?

[Kleinstein]

Normally a picture says more than 1000 words and it does not need much translation.
Clock scew is a systemetic,but fixed phase shift of the clock to different parts of the circuit, e.g. though different path lengths or buffer speeds.
Shrinkage is a different delay for the rising an falling edge kind or different clock scew for both edges.
Jitter is phase noise, as random variations in the delay.

[RoGeorge]

Clock skew - the ideal and the real waveform have the same length (frequency), but the real one became slightly misaligned in time, there is a phase shift from the ideal (ideal == the reference waveform drawn on top)

Clock shrinkage - the ideal and the real waveform have the same length (frequency), but the duty factor is now different than 50%, in that pic the portion of level 1 became slightly shorter than in the ideal waveform on top

Clock jitter - each period is now slightly longer or short than the ideal waveform, the length on average remains the same, but there is a small random wiggling of the length (frequency) of the real waveform when compared with the ideal one on top