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ECG Front end ADS1298
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ZeroResistance:
Just Trying to Understand an ECG Front end like the ADS1298 here.
This is a 8 channel simultaneous sampling Analog Front End for ECG applications.
Now the chip can be driven from analog bipolar supplies like
AVdd +2.5V
AVss -2.5V
and has an internal reference of 2.4V that is referred to the negative supply
Vrefp +2.4V
Vrefn = Avss = -2.5V
The usable input range of the internal PGA / ADC without saturating is +/- Vref / Gain so if I consider a max gain of 12 we get a range from +200mV to - 208mV.
Now I'v attached the characteristics of an ECG signal below.
As can be seen the signal of interest is only around 5mV but it is imposed on a dc electrode offset of +/- 300mV and in addition to that a large common mode mains offset of upto 1.5V.
My question is, if I DC couple this ECG signal to the inputs of the PGA, how are such large offset voltages not saturating the PGA?
Is the high CMRR of the device (-115 dB) taking care of these offsets.
RandallMcRee:
Yes, but the CMRR is only applicable over the CM range, so in the datasheet is needed to see this:
ZeroResistance:
--- Quote from: RandallMcRee on June 13, 2019, 04:20:08 pm ---Yes, but the CMRR is only applicable over the CM range, so in the datasheet is needed to see this:
--- End quote ---
But I guess the offset also gets "Multiplied" by gain if its dc coupled, so a offset of 0.1V with a gain of 6 will appear as 0.6V at the output of the PGA. AFAIK in dc coupled system there is no way to remove this offset unless of course a circuit is built to tackle it. The offset is allowed to passthru the PGA stage and the ADC stage and only remove using digital filters in firmware.
Please correct me if I'm wrong.
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