Single Phase Voltage And Current Signal Output Board

[threephase03]

Hi All

The goal of my project is to digitally control AC signals that I can feed into power amplifers that will produce voltage and current that I can measure with some power meters i've made.
I've got units at work I can use but there cost if around the 100k mark so being able to make something cheap I can use at home would be fantasic. I made one that works with dials and switches
but being able to digitally control the phase angle and amplitude would make it awesome.   

I havent used a CD4053 before and i'm not sure if i read the datasheet correctly, If anyone would be able to review my drawing and find my mistakes before i get it made i would be extreamly greatful.
I have this habit of everytime I make a board for the 1st time it has issues that I need to fix.   

Thank you to all that have read my post.

Jon     

[u666sa]

I havent used a CD4053 before and i'm not sure if i read the datasheet correctly, If anyone would be able to review my drawing and find my mistakes before i get it made i would be extreamly greatful. I have this habit of everytime I make a board for the 1st time it has issues that I need to fix.   

Each IC (both MCP23S08s, the LM358s, and the CD4053) needs a 100 nF decoupling capacitor right at the power pins. Missing or distant decoupling is one of the most common mistakes. Triple check SCK, SDI, SDO, and especially the two separate CS lines. If CS is wrong or floating, the expanders will behave unpredictably. Also make sure unused I/O pins aren't left floating. On a single supply, the LM358 can't swing all the way to the rails. Your amplitude and phase conditioning stages need to stay within its input common mode and output swing limits, or you’ll get clipping or distortion. CD4053 can only switch signals that stay strictly within its supply rails. If you're feeding it any kind of bipolar AC, or anything referenced below ground, it won't behave correctly. Make sure the AC going through the switch is low‑voltage and already conditioned so it never exceeds the CD4053's VDD/VEE range. Make sure the A/B/C select pins and INH are all tied to defined logic levels. INH floating is a classic source of random switching. Keep analog ground (op‑amps, AC path) and digital ground (SPI, expanders) from sharing long thin traces. Tie them together at a solid point to avoid injecting digital noise into the analog path. 

[u666sa]

Add test points on the op‑amp outputs, CD4053 COM pins, and SPI lines for the prototype. 

[threephase03]

Thank you much appreciated.

[Terry Bites]

I had an idea a while back using a pll to create a clock from the input and feed it to a DDS chip.
The phase parameters are easily adjusted. Typically:

FOUT = (M (REFCLK)) /2^N
FOUT = the output frequency of the DDS
M = the binary tuning word
REFCLK = the internal reference clock frequency (system clock)
N = The length in bits of the phase accumulator.

An RMS to DC or envelope detector at the input could control a a VCA to match the output amplitude.
I gave up on it for a lack of time.  Anyone else been down this route?
I'm thinking that a DSP would be easier though.