I either don't worry about it, or drive the gate slow enough that it isn't much of a problem*, or use a smart switch (which includes level shifting and protection, big improvement).
*How did they do an entire appnote without simply shoving in a stupid gate resistor? Well, yet more proof that appnotes are a crap shoot. To be clear, I mean a resistor either in series with the driving (low side) drain (in which case high side Vgs(on) is divided down from the input -- this is useful for situations with high Vin), or in series with the high side gate (in which case turn-off is even slower, because the pullup acts in series with the gate resistor). Whatever the arrangement, the point is to get a sizable Thevenin equivalent resistance into the gate pin.
The initial-step behavior of their suggestion, is simply normal Miller effect given a nonlinear device (namely, the PMOS isn't amplifying for Vgs > Vgs(th)). There are two additional reasons why it sucks:
1. The slew rate is limited by the low side's gm or Rds(on). It's basically drawing short-circuit current through the gate and cap. So any modest slope (say ~V/ms) takes a fuckoff massive cap, and draws huge startup current (basically shoot-through current -- it flows through both MOS -- except there's a capacitor in series so it tapers off over time).
2. Connecting low impedances to the gate terminal, especially capacitances, is very troublesome in general. This warning applies to zener diodes** as well as G-S shunt capacitance, as well as Miller capacitance (D-G) shown here. During the active range (Miller plateau at the gate, slope at the drain), the transistor can oscillate at the characteristic frequency of that loop -- and with gm being so high, it doesn't take much. I'm not sure how doable this is with small SMTs (you may be able to get away with it more often), but it's commonly seen causing 200-400MHz oscillation in power transistors (notable because TO-220 for example has a whopping ~7nH lead inductance per pin).
**Often, for the resistor-divider case mentioned above (*), a zener is in parallel with the pullup resistor. This extends the supply range where safe Vgs(on) is applied.
Tim