ESD and latch protection

[Tonn]

Hi,

I have a C-MOS IC with two analog and four digital lines.
The circuit is 5V for the digital part and 3.3V for the analog part.
The datasheet recommends esd-protection as well as latch-protection. For latch-protection it recommends Schottky diodes 300mV or less.

I have studied IC's like: DALC112S1, USBLC6-2SC6,USBLC6-4SC6 and several Schottky- and esd-diodes.
Examples found on the internet tend to just use a few esd-diodes and rarely Schottky's.

I seem to end up with lots of components while having a rather limited PCB area available.

Is there a recommended way to solve this?
Is there a convenient IC I am missing?
Am I overthinking?

Thanks,
Tonn

[T3sl4co1l]

BAT54S is a typical go-to. Mind the leakage with regards to analog sections.

Tim

[danadak]

The reason for the lower threshold diodes is to mitigate current
flow in onchip parasitic silicon diodes, which have a "typical"
threshold of .6, .7 V. This in turn prevents triggering the para-
sitic SCR inherent in CMOS devices.

I too have wondered why folks feel ordinary Si diodes are good in-
surance for latchup, kind of rolling the dice which diode turns on
first, internal or external.


http://www.ti.com/lit/wp/scaa124/scaa124.pdf


http://www.ti.com/lit/an/slya014a/slya014a.pdf



Regards, Dana.

[Tonn]

Thank you very much for the information.
The BAT54S seems perfect for the data lines and the documentation is very clear.

Would the BAT54S combined with a 1k series resistor in the input line double as esd-protection? (As in fig. 13 - Latch-Up, ESD, and Other Phenomena).

[T3sl4co1l]

I too have wondered why folks feel ordinary Si diodes are good in-
surance for latchup, kind of rolling the dice which diode turns on
first, internal or external.

They can be. Not "good", but input protection diodes typically have fairly high Vf and RS.  A much beefier, conduct-ier diode like a 1N4148 (but maybe not a BAV99, which isn't much different but has fairly high Vf, well, in the data sheet; I haven't actually measured them personally -- put that on the list) will draw more current than the ESD diode.

This is especially important at high currents, where the internal resistance (RS) dominates.  An ESD strike might still deliver more current than the latchup margin, but -- assuming the device doesn't expire from latchup, and gets power cycled -- it can survive more ESD than the naked chip.

So, such a decision might be motivated by whether you're going for a type A, B or C failure criterion for ESD and EMI.

Tim

[David Hess]

A series resistance between the external protection diodes and the IC pin with its internal protection diodes will limit the current to that developed between the difference in diode voltages.  Schottky diodes without the series resistance are preferred for simplicity unless their greater leakage is unacceptable.

There are more complex clamp schemes using bipolar transistors or pairs of diodes if bias supplies above and below ground are available.

[T3sl4co1l]

Yeah, and between that and RFI filtering, you can quickly pile on a lot of parts per IO, and the value of those ESD+filter parts (like USBUF01W6) starts looking really good!

Tim

[TheUnnamedNewbie]

I too have wondered why folks feel ordinary Si diodes are good in-
surance for latchup, kind of rolling the dice which diode turns on
first, internal or external.

They can be. Not "good", but input protection diodes typically have fairly high Vf and RS.  A much beefier, conduct-ier diode like a 1N4148 (but maybe not a BAV99, which isn't much different but has fairly high Vf, well, in the data sheet; I haven't actually measured them personally -- put that on the list) will draw more current than the ESD diode.

This is especially important at high currents, where the internal resistance (RS) dominates.  An ESD strike might still deliver more current than the latchup margin, but -- assuming the device doesn't expire from latchup, and gets power cycled -- it can survive more ESD than the naked chip.

So, such a decision might be motivated by whether you're going for a type A, B or C failure criterion for ESD and EMI.

Tim

In addition, the inductance of the bondwires in series with the bondpad capacitance will shunt a lot of the voltage, meaning the external diode turns on a good bit before the internal one does.

[T3sl4co1l]

In addition, the inductance of the bondwires in series with the bondpad capacitance will shunt a lot of the voltage, meaning the external diode turns on a good bit before the internal one does.

I don't know of any chips that are big enough for that to be relevant (except perhaps IGBT modules, where a few stray nH matters for dI/dt and peak turn-off Vce).

A bondwire has a fairly high characteristic impedance (say 100-150 ohms), and the pads are lower, more or less forming a low-frequency-equivalent LC lowpass structure.  But, the cutoff frequency is comparable to the dimensions of the structure -- a few mm gives bandwidth of GHz.  ESD doesn't have much energy above mid-100s MHz, so, I don't see that that would be relevant here.

With diodes involved, the impedance is much lower, which may make the inductance relevant (but will more than swamp the capacitance).

But on that subject, there is definitely a place where significant lengths (cms) affect ESD response: any stub length between the pin-to-device path and the ESD protection device amounts to equivalent inductance that directly worsens performance!  Make sure to route from IO connector, to ESD device, to [rest of the circuit].  Make sure that any GND/VCC connection to the ESD device is extremely short and well bypassed (capacitor right next to device), and use a low impedance ground (ground plane or pour with stitching).

Stub length includes the physical length of the part, so a DFN is better than a SOT-323-6 is better than a SOD-123 is better than a DO-35.  Some ESD protection chips are extremely small (DFNs and such), which is a downside for energy handling but a bonus for peak voltage clamping -- when connected properly, of course!

Tim

[TimFox]

In general, latch-up in CMOS devices is caused when any pin (input or output or power) goes out of the range between the substrate (normally, the most negative point in the circuit) and the most positive point in the circuit by more than the forward voltage of a P-N diode.  Hence, the use of Schottky diodes, which have a forward voltage less than that of P-N diodes.
Mixed-signal parts, with positive and negative supplies, such as analog switches are prone to this when the positive supply comes up before the negative supply, since the output resistance of the negative regulator can be very high when its input power is very low.  In that case, the Vss pin (substrate) floats positive from ground with the current from Vdd into the high resistance, while the ground pin stays at zero and therefore goes out of the allowed range temporarily.  With the appropriate Schottky from Vss to ground, this is prevented.

[Tonn]

Thank you everyone for all the information.

The BAT54 series looks good and is actually mentioned in Analog Devices documentation (http://www.analog.com/en/technical-articles/protecting-adc-inputs.html).
Leakage is < 2uA at 25C and therefore quite usable.

I also found the BAT754 series. They are similar but have an even smaller Vf.

The USBUF01W6 is amazing. I am going to try that when adding Wifi to my circuit.

For now I'm going for: PCB pin -> series resistor -> Schottky's (BAT54S+) -> ADC chip.

Best wishes,
Tonn