EEVblog Electronics Community Forum
Electronics => Beginners => Topic started by: joniengr081 on April 18, 2023, 07:32:14 am
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The Ethernet bit rate which are common these days are 1 Gbps and 10 Gbps. The question is how do we relate Gbps to the clock frequency of the digital signal and time period. For 1 Gbps the digital signal is itself 1 GHz or 500 HMz ?
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Depends on the physical interface. Wikipedia has a lot of information:
https://en.wikipedia.org/wiki/Ethernet_physical_layer#1_Gbit/s
In short, it can be 62.5MHz, 125MHz, 625MHz for 1G, and pretty much everything between 800MHz and 13.7GHz for 10G.
I personally like 9.95328 GHz, since I started 25yrs ago on STM64 optics using that rate :-)
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Please explain how this can be 62.5MHz, 125MHz, 625MHz for 1Gbps. By clock frequency I mean cycle per second measured in Hz. There can be 2 bits per Hz, that way I assume 500 Hz for 1Gbps but I don't understand how it can also be 62.5MHz, 125MHz, 625MHz for 1Gbps.
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Ethernet is not just digital 1 or 0 (apart from the ancient BASE10).
Multiple voltage levels and encoding is used to purposely reduce the required frequency bandwidth, so that long cable runs can better handle the speeds.
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It can be modulated.
https://en.wikipedia.org/wiki/Pulse-amplitude_modulation
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The Ethernet bit rate which are common these days are 1 Gbps and 10 Gbps. The question is how do we relate Gbps to the clock frequency of the digital signal and time period. For 1 Gbps the digital signal is itself 1 GHz or 500 HMz ?
GMII Ethernet interface uses 125 MHz clock x 8 parallel bits. If you're asking for physical media, it's not like serial transmission, it uses quadrature (QAM modulation), where both - amplitude and phase are used to encode symbol, so it sends entire symbol (several bits) over media at once. Some symbol codes are reserved and don't used for usual data transfer.
But all that things with modulation/demodulation, link negotiation, signal power adjustment, error correction and other things are done in GMII PHY chip, which is just provide you with 125 MHz x 8 bit parallel bus, so you don't care how it's encoded on the physical media.
So, the answer on your question is 125 MHz * 8 bit = 1000 Megabits per second. Full Duplex link allows to transfer 1000 Mbps in both direction simultaneously, and the the total bandwidth of the media will be 2 Gbps.
Also note, that these 1000 Mbps is not a max speed for data transfer, because you're needs to send packet preamble, address and CRC for every data packet, so it consume some part of full bandwidth. Using large packets (they named jumbo packets) allows to reduce overhead costs, so you can use higher data transfer rate by using jumbo packets, but usually they are not accepted by default and system needs to be configure in order to receive jumbo packets.
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Please explain how this can be 62.5MHz, 125MHz, 625MHz for 1Gbps.
The stream is 125 MHz x 8 bit. But it can be transfered in different way, for example you can transfer 8 bits on rise edge of clock, or 4 bits on rise edge and 4 bits on fall edge. 4 bits transfer allows to reduce data lines, but it needs more strict timing requirements because it uses double data rate through each data line.
I didn't hear about 62.5, 625 and 1000 MHz. Usually GMII PHY has 125 MHz clock and can be configured for 4 bit DDR or 8 bit SDR transfer.
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I didn't hear about 62.5, 625 and 1000 MHz. Usually GMII PHY has 125 MHz clock and can be configured for 4 bit DDR or 8 bit SDR transfer.
These frequencies are the occupied bandwidth on the copper wires. Not the actual data rates.
For the trusty old 100BASE the 100Mbit of actual digital bandwidth is packed into a symbol rate of 125MBaud (data rate goes up due to the 4B5B encoding method) but then uses 31MHz of frequency bandwidth on the wire due to using MLT3 modulation. This way it is well within the rated 100MHz bandwidth of CAT5 cable.
For the popular 1000BASE the 1Gbit is packed into a symbol rate of 125MBaud on 4 twisted pairs. But instead uses PAM5 modulation to pack enough data into the low baudrate. This requires a higher frequency bandwidth of 62.5 MHz on the wires, but is still within the 100MHz rating of CAT5
The 625MHz i have no idea where you got that from. Perhaps the 10GBASE where it packs 6.25 bits per Hz of bandwidth giving you 10Gbit using 4 pairs doing 800Mbaud and occupying 400MHz of bandwidth, so within the 500MHz rating of CAT6
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Thankyou very much for reply. I was not aware about the modulation but now I think the concept is clear to me.
I am familiar with 1Gbps (1000BASE) in which there are two x differential pairs and two Rx differential pairs. Two differential pairs on each way can make four different symbols and because of DDR, there will be 8 bits, so the digital signal on the Tx and Rx will be 125 MHz for 1Gbps (1000BASE). The Ethernet connector RJ45 have four differential pairs, is compatible with 100 Mbps and 1000 Mbps. Which connector and pinout is for 10 Gbps ? The digital signal on 10 Gbps is of which clock frequency
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100 mbps only needs one rx and one tx pair (4 wires). gigabit and up needs all 8 wires.
Maybe this Wikipedia article will help, when it comes to 10 gbps : https://en.wikipedia.org/wiki/10_Gigabit_Ethernet
and this page also has details about the latest additions 2.5g and 5g modes : https://en.wikipedia.org/wiki/2.5GBASE-T_and_5GBASE-T
The article has a link to a PDF with details about the modulation used:
10GBASE--T Coding and Modulation:T Coding and Modulation: 128128--DSQ + LDPCDSQ + LDP: https://grouper.ieee.org/groups/802/3/an/public/sep04/ungerboeck_2_0904.pdf
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Two differential pairs on each way can make four different symbols and because of DDR, there will be 8 bits, so the digital signal on the Tx and Rx will be 125 MHz for 1Gbps (1000BASE).
No. You're confuse physical medium and GMII PHY interface.
GMII PHY interface is a data lines between your CPU/FPGA (MAC) and GMII PHY chip, it always have 125 MHz 8 bit, but these 8 bits can be transfered through 4 data lines with DDR or with 8 data lines with SDR. This is configured when device is designed.
Physical medium is a different thing. This is environment through which actual transfer of data is done. It can be twisted pairs or optical fiber, or RF spectrum, etc. For example, you send some data to a GMII PHY as 8-bit 125 MHz stream, GMII PHY encode it into symbols and send that symbols with PAM modulation through differential pairs to a remote link point, remote link point GMII PHY receive it and decode to a 8-bit 125 MHz stream and put to CPU/FPGA for further processing.
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Yes, there are two interfaces in 1000BASE.
Between CPU/FPGA and GMII PHY chip, there are four Tx and four Rx lines. With DDR it will be 8 bit 125 MHz interface that will make 1 Gbps each way, right ?
Between GMII PHY chip and the PCB connector RJ45, there are in total four pairs, two pairs for Tx and two pairs for Rx. I am wondering which digital signal frequency we have on this interface.
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Between CPU/FPGA and GMII PHY chip, there are four Tx and four Rx lines. With DDR it will be 8 bit 125 MHz interface that will make 1 Gbps each way, right ?
No.
CPU/FPGA side is named MAC (media access controller).
PHY is a physical layer.
Between MAC and PHY there is always 125 MHz 8-bit stream. But this stream can be transferred with DDR through 4 data lines (by using both clock edges it result to a 8 bits). Each PHY endpoint has two streams - RX and TX, each 125 MHz 8-bit.
Next, between two remote PHY the link is established through some medium such as twisted pair or optical fiber. It uses pulse-amplitude modulation to send symbols over medium. In such way RX and TX streams are encoded into symbols and send over medium to the remote PHY endpoint, remote PHY endpoint decode it to TX and RX stream for MAC.
Between GMII PHY chip and the PCB connector RJ45, there are in total four pairs, two pairs for Tx and two pairs for Rx. I am wondering which digital signal frequency we have on this interface.
it sends symbols through all 4 pairs, this is not a digital signal, but analog one because it has more than 2 amplitude levels. I don't know how it is encoded on a pairs, because PHY chip doing all job to encode and decode it, so there is no need to deal with it.
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Between MAC and PHY there is always 125 MHz 8-bit stream. But this stream can be transferred with DDR through 4 data lines (by using both clock edges it result to a 8 bits). Each PHY endpoint has two streams - RX and TX, each 125 MHz 8-bit.
GMII is a 8 bit, 125MBaud stream. The clock is 125MHz, the base frequency of the data is 62.5MHz
RGMII is 4 bit, 250MBaud stream. The clock is still 125MHz, but data is transferred on both edges, thus the frequency on the datawires is twice as high, 125MHx.
SGMII is a 1 bit, 1250MBaud stream. The clock is 1.25GHz, but ususally not sent seperately. There is and extra 4B/5B encoding added to ensure enough edges in the datastream to recover the clock. The base frequency of the signal is thus 625MHz.
But this is all board level signalling, no sane person will try to transmit (R)GMII over any distance. SGMII can work, as it is very similar to 1000BASE-TX (1GBit ethernet over fiber). Just the autonegotiation details are different.
it sends symbols through all 4 pairs, this is not a digital signal, but analog one because it has more than 2 amplitude levels.
Its still digital. Its not binary, but still discrete in both time and amplitude.
On the other hand, to do anything useful with it you'll have to watch the bandwidth, noise and attenuation of the link so you might as well treat it as an analog signal.
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Thank you very much for reply. Now I understand the interface between MAC and PHY that there is always 125 MHz 8-bit stream in 1Gbps (1000BASE). There are four Tx and four Rx that makes 8 bits with DDR.
Now I would like to understand the interface between two remote PHY.
Let's suppose there is a ZYNQ SOC development board having MAC implemented on the ZYNQ SOC and a PHY chip on the development board. The ZYNQ SOC support 1Gbps (1000BASE). There are four differential pairs on the PCB between PHY and Ethernet connector. Two for Tx and two for Rx. I am interested to understand this signal interface.
I also understand that it uses pulse-amplitude modulation to send symbols over copper traces to the Ethernet connector.
The symbols send are not digital signal, but they are analog and may have more than 2 amplitude levels, right ? Let's not go in to encoding scheme to keep things simple. Please correct me if anything I wrote is wrong.
Now what about if the link is 10 Gbps instead of 1 Gbps. How many Tx and Rx lines between MAC and PHY in 10 Gbps Ethernet and what is the frequency and how many bits (like we know it is 8-bit DDR 125 MHz consisting for four Tx and for Rx in case of 1 Gbps). Any is it still analog phase amplitude modulated between the PHY and the Ethernet connector on the copper traces on PCB ? How many pairs signal have between PHY and the Ethernet connector on the PCB. It is still RJ45, maybe not.
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Thank you very much for reply. Now I understand the interface between MAC and PHY that there is always 125 MHz 8-bit stream in 1Gbps (1000BASE). There are four Tx and four Rx that makes 8 bits with DDR.
Nope, its either 8 bits TX, and 8 bits RX, and called GMII. Or 4 bits TX, 4 bit RX, and called RGMII. DDR is either memory or a former communist country in Eastern Europe.
Let's suppose there is a ZYNQ SOC development board having MAC implemented on the ZYNQ SOC and a PHY chip on the development board. The ZYNQ SOC support 1Gbps (1000BASE).
Don't know what your talking about 1000BASE. It does not exist.
There is 1000BASE-T, which is probably what you mean. (1G ethernet over Cat5e (or better) cable, using RJ45 connectors. This is explained in the Wikipedia page linked in the first reply of this thread)
There is 1000BASE-SX, which is 1G ethernet using 850nm light over short (550m) multimode fiber lengths (and what is probably the most common 1G ethernet over fiber spec)
And there are a lot of other 1000BASE-xxx variants. All different, and more importantly, all different signalling specs!
There are four differential pairs on the PCB between PHY and Ethernet connector. Two for Tx and two for Rx. I am interested to understand this signal interface.
Nope. All four are for TX, and all four are for RX. And they dont go to the connector, they go to the magnetics (which might be integrated in the connector, so you cannot see them). And the magnetics are really important!
1000BASE-T uses the same trick as old analog phone lines: The signal on the wire is TX+RX. The receiver knows what the transmitter is transmitting, and can substract it from the signal on the wire.
Thus all 8 wires are used for transmission, and reception, at the same time!
I also understand that it uses pulse-amplitude modulation to send symbols over copper traces to the Ethernet connector.
The signal on the copper traces to the connector is the same as the signal on the wire. (There is some difference in voltage etc between the PHY to Magnetics signal and the Magnetics-core-wire signal, but otherwise (shape, frequency, information content) they are exactly the same)
The modulation scheme is called PAM5, which is kind of a misnomer as there is nothing analog in the actual ethernet signal.
The symbols send are not digital signal, but they are analog and may have more than 2 amplitude levels, right ?
They are digital. The signal is 5-level, but only those 5 levels. An analog signal would use any and every level between minimum and maximum.
And there is no simple mapping from the bits in the original datastream to the levels on the wire, because there is an 8 bit to 10 bit mapping, and a Trellis encoding done in the PHY. This all improves signal quality.
Now what about if the link is 10 Gbps instead of 1 Gbps.
Check Wikipedia. Or IEEE802.3, its free, and its all in there.
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They are digital. The signal is 5-level, but only those 5 levels. An analog signal would use any and every level between minimum and maximum.
in such way we can say that the output of 24-bit DAC is also digital, because it has only 16777216 levels :D
As I understand, term "digital" describes systems that generate and process binary data. So, if it generates signal which is not binary, then it's not digital.
The signal with 5 amplitude levels cannot be generated with digital logic gates. There is needs Digital to Analog Converter (DAC) to do that, isn't it?
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They are digital. The signal is 5-level, but only those 5 levels. An analog signal would use any and every level between minimum and maximum.
in such way we can say that the output of 24-bit DAC is also digital, because it has only 16777216 levels :D
Yes we can. And the difference between the intended analog signal and the output of the DAC is called quantization noise.
As I understand, term "digital" describes systems that generate and process binary data. So, if it generates signal which is not binary, then it's not digital.
By that logic, text is analog since there are 26 letters, and thus its not binary.
A much more useful differentiation is discrete versus continues. If there is a limited number of allowed levels, its discrete/digital. If any level is allowed (and considered different from any other level!), it is continues and thus analog.
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Yes we can. And the difference between the intended analog signal and the output of the DAC is called quantization noise.
No, we can't, since digital signal is converted to analog one with DAC, it is no more digital, but analog.
The difference here is that it doesn't represented with discrete 1 and 0 levels with discrete points in time at clock edge, the DAC output has infinite continuous spectrum and continuous amplitude. Even if DAC has just 5 levels, the output can have infinite count of levels between these 5 levels.
Technically digital signal is also represented with analog signal. But since it represents discrete amplitude 1 or 0 and discrete points in time determined by a clock edge it can be assumed as digital.
The reason why all 4 pairs are used for TX and RX simultaneously is that the signal here is analog, not digital. The digital signal cannot support transfer in both direction simultaneously through the same wire. It is possible for analog signal, because receiver knows what is the current transmitter level and what is the phase delay and can use analog substraction to remove it for further processing.
Since this is not digital signal it also cannot be processed with a digital gate input, it needs ADC to convert it from analog to a digital domain.
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The difference here is that it doesn't represented with discrete 1 and 0 levels with discrete points in time at clock edge
What you describe is synchronous binary signal.
I know, in everyday speech everybody says "digital" when they mean "binary", but every once in a while you find academic coffee discussions like this and you ought to be careful.
Multi-level signals are often called digital signals; probably a significant distinction being ability to correctly interpret those levels later on (practically impossible with 2^24 levels, of course).
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By that logic, text is analog since there are 26 letters, and thus its not binary.
it depends on what you're mean when talking about "text".
If you're means binary encoding of letters where letter is represented with bytes and every byte is represented with a set of 8 binary values, where every binary value is represented with 1 or 0 value, then such a "text" is digital.
But if you're means text as existing letters on the paper, where each letter is unique due to a paper roughness and uneven ink color, then such a "text" is not digital, but analog. This is because digital text is converted to analog text during printing and since it's converted to analog text, it is no more digital, but analog one :)
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I know, in everyday speech everybody says "digital" when they mean "binary"
This is because almost all digital electronics uses binary logic. Other kind of logic is also possible, for example there is possible ternary logic. But in practice it's not used because it's more complicated than a binary logic and used primary in math analysis. This is why the term "digital" is used for signals which can be represented and processed with a binary logic gates.
If you want signal which is represented from more than two levels, there is needs conversion between digital (binary) signal to analog (multi level) signal. Such conversion can be done with DAC and ADC.
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I know, in everyday speech everybody says "digital" when they mean "binary"
This is because almost all digital electronics uses binary logic. Other kind of logic is also possible, for example there is possible ternary logic. But in practice it's not used because it's more complicated than a binary logic and used primary in math analysis.
Yeah, don't see multilevel everyday, but right now the discussion is about a thing which does not use binary but multi-level, namely Ethernet. Not logic, just 1:1 communication preserving the data, but why would that matter if we want to be autistic about terminology.
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Yeah, don't see multilevel everyday, but right now the discussion is about a thing which does not use binary but multi-level, namely Ethernet.
It's happens that the term "digital" is applied to a binary signal representation.
Did you ever seen DAC or ADC with a digital interface which is not binary and has multi-level amplitude on digital input/output? :)
Regarding to the signal on ethernet pairs, it is 100% analog, because it may have infinite count of levels despite the fact that it is generated with DAC that has just 5 discrete levels. This is why analog operations is used on that signal in order to make possible two way transfer through the same pair simultaneously.
And there is not just 5 levels on Ethernet pairs, because Ethernet PHY can tune amplitude of the transmitted signal in order to get the better SNR level. In addition ethernet pair signal also has a signal echo due to reflection from the receiver endpoint. So, this is very complex analog signal.
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Back in the day 10M Ethernet segment had a max. length of 185m.
Not because of attenuation or anything like that, it was for collision detection, shortest packet must reach all parts of the segment.
It has not changed, basic function is still there and so upgraded away, and so current 100m cable limit is something else but still something.
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I think it's better to use the term "discrete signal" instead of "digital signal" if you want to emphasize that the signal represents discrete analog levels. Because term "digital" is used for binary discrete signals.
But the signal on ethernet pair is more complicated and cannot be treated as discrete, because it consists of analog combination between 5 levels DAC, analog gain of PGA which is used to tune signal power, reflected echo and the analog interference with a waveform of signal from remote endpoint. Also it has signal attenuation due to losses in the transmission line. And of course it has a sum of environment noise and interference. So, this is very complex analog signal. And this is why I say that this is analog signal.
The same we cannot say that analog RF output of a cell phone is "discrete"or "digital". It is analog, despite the fact that a cell phone transfers digital data through that analog signal. It has analog RF frontend with analog mixer, analog amplifier, analog filters, analog switches, so it cannot be treated as discrete.
The same the signal on ethernet pair cannot be treated as discrete or digital because it is generated with DAC, amplified with PGA, and filtered with analog filters and passed through RF transformers inside Ethernet connector. This is all analog signal processing.
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It can be argued that until you get down to counting individual electrons and photons, all physical signals are analogue. Those analogue signals may be conveying digitally encoded information.
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No, there is no discrete level due to photon/electron quantization. The quantum of photon depends on the photon frequency, so you can divide that quantum by reduce frequency. And you can divide that quantum until zero value for DC frequency. :)
I just wanted to say that the signal on ethernet pair is generated and processed with analog circuits and contains continuous frequency spectrum and infinite levels of amplitude, so it cannot be named as digital or discrete. This is classic analog signal. Yes, that analog signal carries digital data and depends on discrete transmitter state, but that doesn't means that it is digital or discrete.
If you pass the signal from ethernet pair through some discrete buffer with 5 levels to remove analog components it will break ethernet link. That break happens because the signal is analog and you destroy it by removing important analog components.
The cell phone also transfers digital data through electromagnetic waves, but this doesn't means that electromagnetic waves are digital or discrete.
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It's happens that the term "digital" is applied to a binary signal representation.
Of course it "happens", because binary signalling is, by definition, a subset of digital signal presentation, just like 3-level and 5-level are.
Did you ever seen DAC or ADC with a digital interface which is not binary and has multi-level amplitude on digital input/output? :)
No, but we are not discussing DAC or ADC interfaces, but Ethernet, which does have this multi-level signaling. Yet you are playing along like it does not exist anywhere.
What's with all this weird goal post shifting? Why it's so hard to admit you made a simple terminology mistake mixing up digital and binary (a very common mistake) and redkitedesign is right?
Regarding to the signal on ethernet pairs, it is 100% analog, because it may have infinite count of levels despite the fact that it is generated with DAC that has just 5 discrete levels.
But exactly the same is true for a binary signal, for example on SPI bus. "100% analog" means nothing and is useless distinction if you call every electronic signal "100% analog". In reality, the digital-ness comes from the fact that the signal can be interpreted in a way which produces a number, the same number used to generate the signal.
You can choose to call Ethernet analog signalling but others will disagree, because others consider analog something which does not have a concept of numbers at all, but instead deals with some continuous physical phenomena representing a value directly (analog clock (mechanical position), analog image (on a film), analog computer (opamps dealing with voltages)...)
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But exactly the same is true for a binary signal, for example on SPI bus. "100% analog" means nothing and is useless distinction if you call every electronic signal "100% analog".
No, it is not the same. If you put digital (binary) buffer between SPI transmitter and SPI receiver it doesn't affect communication. It will still works. Because SPI communication uses digital (binary) signal.
But if you put the buffer which remove analog components from ethernet signal, it leads to a break of ethernet link, because ethernet PHY uses analog signal for communication with remote end-point.
Gigabit Ethenet PHY output is actually analog RF transceiver which has gain control, echo cancelation and analog signal substraction. It uses digital signal processing for analog signal, but this doesn't means that it uses digital signal for the link. Such signal cannot be digital.
Talking that ethernet pair has digital signal is the same as talking that mobile phone uses digital electromagnetic waves for communication. No, this is absurd. It uses classic analog radio communication for transfer digital data over electromagnetic waves and electromagnetic waves are not digital and not discrete, they are analog and continuous. It uses digitals signal processing and ADC/DAC for converting between digital and analog signal, but signal received on antenna and sent by antenna is analog, not digital.
The same with gigabit ethernet PHY, it uses digital processing for analog signal and ADC/DAC for converting digital domain signal into analog one and back, but signal on ethernet pairs is analog.
Just think, gigabit ethenet signal is a multi-level analog signal which has random and varying amplitude and added high power interference of known signal. If you put it on a digital logic element input which accept just 0 or 1 discrete value it just can see self transmitting signal and will be unable to listen for remote signal.
There is no "multi-level logic elements" inside gigabit PHY, it uses classic digitial circuit built with binary logic elements and ADC/DAC for converting between analog and digital domain. And pair between two PHY is analog domain....
You can choose to call Ethernet analog signalling but others will disagree, because others consider analog something which does not have a concept of numbers at all
There is no numbers on signal between two gigabit PHY, there is classic analog and continuous waves with continuous frequency spectrum on the pair between PHY.
And there is no way to process such analog signal with digital circuit without ADC/DAC converters to convert digital domain into analog and back. Because you cannot process analog signal with digital circuit, it needs proper conversion from analog domain to digital and from digital to analog.
Digital circuit consists of binary logic elements which can work with digital signal represented with binary level 1 and 0. And there is no way to process analog signal which consists of random and varying amplitude with digital circuit.
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Here is waveform of 1000BASE-T signal, do you really think that this is a "digital signal" which can be processed with digital circuit by putting that signal on digital element input (which accepts just logic 1 or 0)? :)
I even don't talk that amplitude of that signal can be changed on the fly by PHY during link negotiation.
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Why it's so hard to admit you made a simple terminology mistake mixing up digital and binary (a very common mistake) and redkitedesign is right?
What I should admit? Digital signal can be processed just by putting it to a digital pin of FPGA. That's not the case for gigabit ethernet signal on a pair between two PHY. It needs at least ADC converter to convert such signal from analog domain to a digital domain.
I just don't see the way how such signal can be processed as digital without conversion from analog to digital. Do you see that way?
This is why I cannot accept your terminology, where you name analog signal (which requires significant dynamic range) as a digital.
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What about spectral lines.
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It can be argued that until you get down to counting individual electrons and photons, all physical signals are analogue. Those analogue signals may be conveying digitally encoded information.
Exactly. And for convenience, the term "digital signal" means such signal that is successfully conveying digital data - numbers. If one does not agree with this, then the term "digital signal" does not exist at all (binary signalling would not be a special case, why would it - it still has noise etc.), which only leads to having to use more verbose language.
radiolistener's issue is the coexistence of two different logics that are contradictory without him noticing it and I am unable to explain this to him any better as he fails to see this simple and fundamental contradiction and instead is beating around bushes coming up more and more walls of text instead.
I accept disagreeing with terminology, even inventing their own no problem at all, but I would expect it to be internally coherent and logical, I just find it odd if one changes their mind randomly between bases b=2 and b=3. A scope trace of some I2C bus does not look any more "digital" than what was posted above, yet he would call that one digital.
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And for convenience, the term "digital signal" means such signal that is successfully conveying digital data - numbers.
No. Digital signal is a signal that can be processed with digital circuit. Digital circuit is a circuit which consists of logic elements working with binary signal levels 0 and 1 and discrete in time according to the clock signal edges.
If you want to use digital signal processing for analog signal, you're needs to use mixed signal device, such as ADC (analog to digital converter) and DAC (digtal to analog converter).
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No. Digital signal is a signal that can be processed with digital circuit. Digital circuit is a circuit which consists of logic element working with binary signal levels 0 and 1.
You will have to explain this over and over again to everyone. Not best use of your time. Good luck.
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DDR is either memory or a former communist country in Eastern Europe.
The term DDR is used a more broadly that just memory. It just means data exchanges on both edges of the clock, which is a widely used technique.
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You will have to explain this over and over again to everyone.
In my opinion it's obvious, I don't understand why you didn't admit it.
Can you please show me example of digital circuit which can process 1000BAST-T signal without ADC converter for signal conversion from analog to digital?
I think it's pretty obvious that if you're needs ADC converter to convert signal from analog to digital, then it means that signal is analog, not digital. Because you cannot process it as digital. ;)
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Digital signal is a signal that can be processed with digital circuit. Digital circuit is a circuit which consists of logic elements working with binary signal levels 0 and 1 and discrete in time according to the clock signal edges.
For the final time. No. "digital" is not synonymous with "binary".
Nor does there need to be a clock. A 2-input gate is a digital circuit. There is no clock input.
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For the final time. No. "digital" is not synonymous with "binary".
If you do not agree with what I said, please give an example of digital circuit which can accept signal which is not binary and can have many amplitude levels.
Note, that ADC and DAC is not a digital device, but a mixed signal device, because they are used on boundaries between digital and analog signal domain.
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Nor does there need to be a clock. A 2-input gate is a digital circuit. There is no clock input.
In most cases there would be a clock, just not right at that gate. However, there are pure asynchronous logic designs that ripple through with no clock at all. The unpredictable nature of how long it takes for any one sample of the design to ripple has limited the use of pure asynchronous logic, but there have been a few examples of complex designs which claim to be completely clock free. I know of a few DSP designs of this type.
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Nor does there need to be a clock. A 2-input gate is a digital circuit. There is no clock input.
yes, logic gate is not discrete in time, but it still has binary input and is used in clocked circuit.
If you don't use clock for your circuit with logic gates you will have metastability issues, in such case logic gate output may stay in undefined state (between 0 and 1), so your circuit cannot be named as clean digital. It's more mixed signal circuit, because it can get state which is not digital.
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Digital input includes an analog reference.
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For the final time. No. "digital" is not synonymous with "binary".
If you do not agree with what I said, please give an example of digital circuit which can accept signal which is not binary and can have many amplitude levels.
Note, that ADC and DAC is not a digital device, but a mixed signal device, because they are used on boundaries between digital and analog signal domain.
1. By your reasoning even a simple inverter (eg 7404) is not a digital circuit. It contains a 1 bit A-D converter.
2. Although initially flash memory stored one bit per cell, many current high density ones store more than one bit per cell. Their internal read sense amplifiers are not working with binary level inputs.
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DDR is either memory or a former communist country in Eastern Europe.
DDR means Double Data Rate, it means that the data is transferred on both clock edges.
SDR means Single Data Rate, it means that the data is transferred on one clock edge (neg edge or pos edge).
There is also QDR which means Quad Data Rate, it means that the data is transferred on both clock edges and in the middle between clock edges.
DDR transfer is used in DDR memory, so this is why this term more familiar in terms of naming memory. But this does not mean that it is used only for memory
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Nor does there need to be a clock. A 2-input gate is a digital circuit. There is no clock input.
yes, logic gate is not discrete in time, but it still has binary input and is used in clocked circuit.
If you don't use clock for your circuit with logic gates you will have metastability issues, in such case logic gate output may stay in undefined state (between 0 and 1), so your circuit cannot be named as clean digital. It's more mixed signal circuit, because it can get state which is not digital.
That is more nonsense.
See my post at https://www.eevblog.com/forum/projects/building-a-philips-pm5530-sync-generator-equivalent/msg4656856/#msg4656856 (https://www.eevblog.com/forum/projects/building-a-philips-pm5530-sync-generator-equivalent/msg4656856/#msg4656856) About 20 digital ICs mostly TTL and about half of them are counters. No two of the ICs have a common clock. No "metastability issues".
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1. By your reasoning even a simple inverter (eg 7404) is not a digital circuit. It contains a 1 bit A-D converter.
No, it doesn't have ADC. This is digital circuit because it is intended to work with binary signal which is represented with 0 or 1.
But if you use it not in digital circuit, it can produce undefined output which is not digital and in such case it will not be digital. But not because it is not digital, but because you're using it not in digital circuit :)
2. Although initially flash memory stored one bit per cell, many current high density ones store more than one bit per cell. Their internal read sense amplifiers are not working with binary level inputs.
I don't know about flash, but you can use digital signal processing of analog signal in digital circuit, but it requires signal conversion from analog to digital domain, this is what ADC is intended for.
About 20 digital ICs mostly TTL and about half of them are counters. No two of the ICs have a common clock. No "metastability issues".
If they are used in such way that metastability cannot happens, then they always have binary signal state which is represented with 0 or 1. In such case they never enter into undefined state and can be declared as digital. :)
But it's hard to implement asynchronous circuit on logic gates that doesn't suffer from meta-stability. If your circuit is async and don't use clock, there is a high risk that it has metastability issue, but it may happens rarely or you just don't notice it because it leaves undefined state too fast and such undefined state don't leads to noticeable change in circuit behavior.
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1. By your reasoning even a simple inverter (eg 7404) is not a digital circuit. It contains a 1 bit A-D converter.
No, it doesn't have ADC. This is digital circuit because it is intended to work with binary signal which is represented with 0 or 1.
The input is an analogue signal. Look at the data sheet. Any level between 0 and 0.8 Volts will be regarded as a Logical '0' for internal processing. Any level between 2.4 and 5 Volts will be regarded as Logical '1' for internal processing.
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The input is an analogue signal.
yes, you can put analog signal on digital circuit input. In such way digital circuit can get into undefined state and turns into not digital.
But the digital circuit means that all digital elements have digital signal on the input, not analog. In such way digital elements don't trap into undefined state and works as digital.
Also you can use digital elements to produce analog output, but it will not be a digital circuit.
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The input is an analogue signal.
yes, you can put analog signal on digital circuit input. In such way digital circuit can get into undefined state and turns into not digital.
But the digital circuit means that all digital elements have digital signal on the input, not analog. In such way digital elements don't trap into undefined state and works as digital.
Again, no. Inputs between 0 and 0.8 or between 2.4 and 5 Volts do not result in any undefined state. They are interpreted bythe chip as '0' and '1' inputs respectively. How do you think it maps those ranges to the two logic values?
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Inputs between 0 and 0.8 or between 2.4 and 5 Volts do not result in any undefined state. They are interpreted bythe chip as '0' and '1' inputs respectively.
And? That threshold range is intended for proper processing of digital signal which may have some interference and offset. But if you put some value from 0.8 to 2.4 V, it may enter into undefined state and after some delay exit to a random output. That behavior is not digital.
So if you use analog signal on the input, it cannot work as proper digital element.
If you want to digitize analog signal, it's better to use analog comparator instead of logic gate. Digital logic gate is not intended to work with analog signal.
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What happens when the input is between 0.8 and 2.4 Volts is not germane to any of the points I have made. It is not a component of anything I have written.
You have not addressed my question of how the gate maps the ranges 0 to 0.8 and 2.4 to 5 Volts to logical 0 and 1 respectively.
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You have not addressed my question of how the gate maps the ranges 0 to 0.8 and 2.4 to 5 Volts to logical 0 and 1 respectively.
if that values taken from datasheet, then this is valid threshold for a digital signal. So, when input signal is within valid range, it is assumed as digital signal. When it goes outside valid range for a digital signal, it is no more digital.
The digital signal has two fixed valid signal ranges. One for digital 1 and one for digital 0.
As you understand, 1000BASE-T ethernet signal is not compatible with digital signal, because it is analog signal and needs to be passed through analog frontend and converted into digital signal with ADC before processing in digital circuit.
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if that values taken from datasheet, then this is valid threshold for a digital signal. So, when input signal is within valid range, it is assumed as digital signal. When it goes outside valid range for a digital signal, it is no more digital.
So let's define a digital signal with 0 = 0-1 V, 1 = 1.25-2.25 V, 2 = 2.5-3.5 V and 3=3.75-4.75V. An IC with a digital input with these specifications is just as much, or as little, an ADC as any 74 series logic IC.
The digital signal has two fixed valid signal ranges. One for digital 1 and one for digital 0.
No, you're confusing the words digital and binary here. A binary signal is a digital signal with two valid signal ranges. One for binary 1 and one for binary 0. I appreciate that English may not be your native language, like for many on this forum, but try to get the technical terms right, and don't invent your own definitions.
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So let's define a digital signal with 0 = 0-1 V, 1 = 1.25-2.25 V, 2 = 2.5-3.5 V and 3=3.75-4.75V.
Digital signal cannot have value other than 0 or 1. Did you ever seen digital logic element which accepts 0, 1, 2 and 3? :)
An IC with a digital input with these specifications is just as much, or as little, an ADC as any 74 series logic IC.
No. Digital logic element doesn't have ADC. Digital circuit such as 74 series works with binary signal 0 and 1.
ADC/DAC is not digital and is not analog device, ADC/DAC is a mixed signal device which works on boundary between digital and analog signal domain.
No, you're confusing the words digital and binary here.
If you're think that the digital signal can have other values than 0 and 1, then please show me example of such digital circuit which accepts not binary signal values such as 0,1,2,3.
Can you please show me some example of digital logic gate which can differentiate 0,1,2,3 discrete values on it's digital input pin?
For example I have digital input pins on FPGA Cyclone IV. Can you please show me, how can I accept and process values other than digital 0 and 1 from these digital pins?
I appreciate that English may not be your native language
English language doesn't matter here, because my native language has the the same difference between digital and binary terms. But digital circuit works with digital signal which is represented as a binary signal state 0 or 1.
Technically you can say that ternary signal is digital, because it also is represented as discrete digits. But in usual meaning digital signal means binary signal, because there is no electronic components for ternary signals. If you want to process ternary signal it's more easy to use ADC to convert it into usual digital binary representation and process it with usual digital binary logic elements.
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But again, when we talking about ethernet signal it cannot be represented with discrete signal represented with just 5 levels. It has more levels, because there is also signal attenuation which is used by PHY for tuning signal power during link negotiation. And there is a sum of local TX and remote TX signals on the same pairs (both 5-level) + cable attenuation for remote TX. It's hard to name such complex analog signal as discrete, because it has too many possible levels.
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But again, when we talking about ethernet signal it cannot be represented with discrete signal represented with just 5 levels.
We're still talking about 1000BASE-T right? You should google an eye diagram once. Or measure one yourself.
You'll quickly notice two things:
- It has really recognizable discrete levels
- There are 4 levels, not 5.
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You'll quickly notice two things:
- It has really recognizable discrete levels
Can you recognize TX and RX signals on the pair?
Also, when you looking at waveform, the link between PHY is already established, so the signal gain is already tuned and remains constant. But it doesn't means that it cannot be different if line characteristics will be changed.
For example see the datasheet for RTL8211E 10/100/1000M Ethernet PHY transceiver, page 18:
In 1000/100Mbps mode the RTL8211E-VB(VL)/RTL8211EG-VB provides dynamic detection of cable length and dynamic adjustment of power required for the detected cable length. This feature provides intermediate performance with minimum power consumption.
Do you really think that transmitter output signal power adjustment is possible for 5-level discrete signal with fixed 5-levels output?
The same for receiver, remote PHY can have different output signal power and the cable length may be different, so it has different attenuation. Do you really think that ADC which can recognize just fixed 5 levels is enough here?
- There are 4 levels, not 5.
I already posted 1000BASE-T signal waveform, I can see at least 11 levels here:
(https://www.eevblog.com/forum/beginners/ethernet-bit-rate/?action=dlattach;attach=1764503;image)
How about 4 levels? Can you explain it? :)
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I already posted 1000BASE-T signal waveform, I can see at least 11 levels here:
How about 4 levels? Can you explain it? :)
It's not an eye-diagram. There is a reason telecommunications engineers like eye-diagrams. They are much more informative than a random waveform.
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It's not an eye-diagram. There is a reason telecommunications engineers like eye-diagrams. They are much more informative than a random waveform.
But it still clear that there is more than 5 levels and this is 1000BASE-T signal with PAM5. Can you explain it?
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But it still clear that there is more than 5 levels. Can you explain it?
You're looking at noise and transients. Not at the relevant part of the signal. That's why you use an eye-diagram.
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it's pretty clear from waveform that these levels are not noise, you can see noise and it's amplitude is much less than visible level step.
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Here is eye diagram of 1000BASE-T signal. Can you explain why it has more than 4 levels as you claimed?
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Here is eye diagram of 1000BASE-T signal. Can you explain why it has more than 4 levels as you claimed?
Because it isn't a regular 1000BASE-T Eye, but a transmitter distortion test.
You might as well post an image of a duck and ask why it doesn't explain you how to find the beach.
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Because it isn't a regular 1000BASE-T Eye, but a transmitter distortion test.
And how is it possible if transmitter output has just 4 fixed levels, as you claimed?
The question we're talking about if we can name 1000BASE-T signal as digital or analog.
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Here is eye diagram of 1000BASE-T signal. Can you explain why it has more than 4 levels as you claimed?
You have shown an eye diagram output of a device running in test mode 4. This uses a digital filter to apply a deliberate inter-symbol interference to the PAM5 signal which generates the 17 levels shown in your post.
The normal PAM-5 eye diagram looks like this:
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mikerj
Thanks. What is your thoughts - is 1000BASE-T pair line is digital or analog?
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mikerj
Thanks. What is your thoughts - is 1000BASE-T pair line is digital or analog?
It's an analog voltage representing a digital value, and this is the same even if you are talking about regular two state TTL logic.
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It's an analog voltage representing a digital value, and this is the same even if you are talking about regular two state TTL logic.
Please clarify - can it be processed with a digital input pin on FPGA? Or it needs to be processed with analog input on ADC first?
How to handle it properly - as analog, or as digital?
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While 1000BASE-T PAM-5 modulated signal can't be connected to a "digital input of an FPGA", it can NOT be connected to "an analog input" of "an ADC" either. It is connected to a 1000BASE-T PHY, which is not an ADC, but a 1000BASE-T PHY (which may contain an ADC or may not, depending on the definitions used.)
You need to get over the fixation of classifying every detail in either analog or digital mental bin. It makes no sense to force every term and concept through such classification at all. And further, analog and digital are not opposites and they are not non-overlapping. Correct answer is, digital data is represented by voltage which carries analog-world phenomena. Communication buses which carry digital data which can be recovered to the same numbers as sent are called digital communication buses, 1000BASE-T and SPI being two examples with multi-level and 2-level (binary) encodings, respectively. They are both digital buses because you put in numbers, you receive numbers. This does not mean numbers have to be physically on the bus; as a number is an abstract concept, this is not possible, and no one is claiming that. Numbers are represented as electrical signals, and this is no different even if you vary number of voltage levels used to convey different symbols.
If you insist on calling multi-level input circuitry an "ADC", then there is absolutely no reason not to call a standard binary CMOS logic input a 1-bit (2-level) ADC as well, therefore rendering your I2C or SPI as much analog as 1000BASE-T is.
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Anyone who has designed PCBs for high speed digital chips knows well that even the binary data signals between the chips have to be treated as analogue. All the analogue impairments such as noise, crosstalk, ground bounce, ringing, reflections, impedance mismatch etc can come into play. There is an eye diagram. It may be simpler than the multi-opening one for GigE but the principle is no different.
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It's an analog voltage representing a digital value, and this is the same even if you are talking about regular two state TTL logic.
Please clarify - can it be processed with a digital input pin on FPGA? Or it needs to be processed with analog input on ADC first?
How to handle it properly - as analog, or as digital?
How to process a simple TTL level digital signal running at 1Gbit/s? Can it be processed with a a simple GPIO pin after being sent down 100m of cable?
Using a high speed ADC permits digital processing to compensate for the distortions that dominate high speed comms systems. If you you were only passing a PAM-5 signal a short distance you could absolutely design a 5 level logic input that would decode it.
It seems to me that you are trying to say that that "digital" == "binary", which simply isn't the case. The flash memory in modern SSDs use multi-level cells to store more than one bit per cell, does that mean the information is no longer digital?
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How to process a simple TTL level digital signal running at 1Gbit/s? Can it be processed with a a simple GPIO pin after being sent down 100m of cable?
We have differential digital input on FPGA, and can use some driver to match it's digital level with voltage selected for digital input on FPGA.
The question is - if we can process signal waveform presented on 1000BASE-T pair as digital, or we need to treat it as analog in order to properly decode or encode it?
If you you were only passing a PAM-5 signal a short distance you could absolutely design a 5 level logic input that would decode it.
Can we handle it with digital GPIO on FPGA? Do we needs ADC and DAC in order to receive and send data with PAM-5? Or we can do it directly as digital signal on digital GPIO?
It seems to me that you are trying to say that that "digital" == "binary", which simply isn't the case. The flash memory in modern SSDs use multi-level cells to store more than one bit per cell, does that mean the information is no longer digital?
Yes it represents digital information, but it stores it in analog state. Isn't it?
There is reverse situation, we can store and process analog signal in digital domain, in such case it is processed as binary state signals, but it represents analog signal. Does it means that DSP which perform digital signal processing is analog circuit? No. It is digital.
I just assume that digital signal/circuit means that it works with binary state of signal. If some element has analog and digital input/output it is assumed as mixed signal. Isn't it?
If I'm wrong, can you please show me clean digital circuit (not mixed signal) which works with signal which is not binary and can have many voltage levels?
I think if such digital circuit which can work with multi-level signals doesn't exists in the whole world, there is no sense to say that multi-level signal is digital, because it can't be processed as digital in the usual sense and needs to be treated as analog signal.
Anyone who has designed PCBs for high speed digital chips knows well that even the binary data signals between the chips have to be treated as analogue.
yes, but if this is a digital circuit it expects two state on the analog line 0 or 1.
If digital circuit is unable to keep signal levels within digital thresholds for 0 and 1, it fails and no longer digital.
Can you show me example of digital circuit which use logic gates which accept and can differentiate 5 separate voltage levels instead of 2?
It is connected to a 1000BASE-T PHY, which is not an ADC, but a 1000BASE-T PHY (which may contain an ADC or may not, depending on the definitions used.)
I'm sure it consists ADC and DAC inside and use DSP in digital domain where binary signals are used.
And, after all, PHY chip is not required element in order to establish 1000BASE-T link. You can do it with your own circuit, but it won't works with simple high speed digital input/output. You're needs to add ADC and DAC to apply conversion between analog domain of 1000BASE-T line and digital domain of DSP which process it as binary signals. Isn't it?
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All the analogue impairments such as noise, crosstalk, ground bounce, ringing, reflections, impedance mismatch etc can come into play.
There is another example. We have old-school analog amplifier on tubes with analog equalizer on the input. Does it means that this analog amplifier turns into digital just because we put on its input the music from 24-bit DAC?
Can we assume 24-bit DAC analog output as digital? Just because it has fixed 16777216 voltage levels :)
If you assume 5 level signal as digital, then why signal with 16777216 levels is not digital and marked as analog on ADC output?
Where is the limit in your model? The signal with 256 voltage levels is digital or analog?
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How to process a simple TTL level digital signal running at 1Gbit/s? Can it be processed with a a simple GPIO pin after being sent down 100m of cable?
I once did a project where we used two digital outputs and a differential input of an FPGA to implement a E1 interface.
E1 was a (mostly non-US) digital, 2.048MBit communications interface that predated fiber, DSL and other high-speed internet access tech. It used a mixture of positive and negative pulses (so strictly speaking, three-level) over a twisted pair (standard telephone line).
Using the outputs as open drain on the outsides of a center-tapped (and supplied!) transformer we could generate the positive and negative pulses.
Using a differential input with some proper biasing resistors we could detect either positive or negative pulses. With some logic we could make a clock recovery, and thus deduce what the undetected pulses were.
And with an internal 200MHz clock we could make the pulses meet the (rather strict) pulse-length requirement.
Worked pretty good, even met the ITU spec. But you needed 4 200MHz capable pins to make one 2MBit interface.....
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redkitedesign
it uses 2 voltage levels for transmission, so it can be handled with digital GPIO.
But 1000BASE-T has 5 voltage levels.
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I happen to have The New Webster Dictionary '67.
Since the definition is not very old it seems that you can demand some leash.
But only if you're out of the loop.
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redkitedesign
it uses 2 voltage levels for transmission, so it can be handled with digital GPIO.
Nope, E1 (and T1 too by the way) use 3 voltage levels. And you show me a GPIO that produces negative (wrt GND) pulses.
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redkitedesign
it uses 2 voltage levels for transmission, so it can be handled with digital GPIO.
Nope, E1 (and T1 too by the way) use 3 voltage levels. And you show me a GPIO that produces negative (wrt GND) pulses.
There is a reason for the "3" in HDB3. :)
I think there was a variant of E1 which did actually use a 2 level code. I don't think I ever saw it used. HDB3 is the normal code for E1. Three level codes are a pretty good way to deal with the DC balance problem.
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Nope, E1 (and T1 too by the way) use 3 voltage levels. And you show me a GPIO that produces negative (wrt GND) pulses.
In that case you're just use several GPIO as DAC (mixed signal circuit).
The same you can use 1-bit GPIO with PWM and analog low pass filter to generate analog signal, but this is not digital, but mixed signal DAC circuit. Isn't it? ;)
Digital element can be used in mixed signal circuit, but it doesn't means that such circuit is clean digital, because it works with analog signals. The example of such mixed signal circuit is a classic parallel DAC. It uses digital outputs to generate analog siginal. But it doesn't means that analog signal from the DAC is digital.
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All digital is actually analog once you look at it closely enough.
For example high speed interfaces like PCIe do just send 1 or 0 over the wire. However due to the kind of speeds it runs at the signal path between two chips can no longer be guaranteed to be nicely flat in frequency up to these sort of GHz bandwidths. This can make the eye diagram close up and introduce bit errors with certain aggressive bit sequences. So one fix that a lot of these interfaces use is pre-emphesis, that way the transmitting side increases the drive voltage near the edge transitions, so that extra high frequency content is put into the signal, once the signal gets to the receiving end the PCB traces have distorted the signal back to being a nice clean square wave again.
Then there is also the aspect of timing. With high speeds you can have skew due to having slightly different time of flight on each wire, so you need to measure the skew and shift your sampling point over to avoid sampling its value inside a signal transition, so it is not purely digital if there is a analog aspect to the timing of the signal. Much like PWM is not really digital, it is just a square wave signal that represents some analog average value (but the difference is the value it represents it analog)
Flash memory also uses multiple levels to store more information inside one flash cell, tho we don't talk about it as being "analog flash memory".
In my opinion these all fall under being digital because they represent information on both the TX and RX side as discrete levels with a fixed resolution. Technically this means that connecting a 24bit DAC over to a 24bit ADC can be described as a digital link utilizing PAM16777216 modulation. However your bit error rate is going to be horrendously bad, so you better have some very very robust ECC on the data.
You can argue for being digital or analog depending on what you want the answer to be.
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In my opinion these all fall under being digital because they represent information on both the TX and RX side as discrete levels
gigabit PHY uses the same pair for RX and TX simultaneously, it can transmit and receive simultaneously in both directions through the same wire and their levels are not fixed, the levels can vary depends on a line length and transmitter gain which is setup by PHY chip during link negotiation when you attach the cable to the port. It carry discrete signal, but it is carried through analog medium over variable analog signal.
For gigabit pair there is needs for at least analog signal substraction and analog signal addition in order to TX or RX something. This is can't be done with digital circuit.
In short, PHY just establish connection through analog line with analog signal and transfers digital data over that link.
You can say that analog RF spectrum is digital because some device can transmit some digital data through it, but it is not digital. For example, the digital line can be used to transfer constant signals which changes very rarely, but you can't do it with gigabit pair between two PHY, because this is analog line and it requires analog signal processing for TX and RX something...
Did you seen RF transformers on the path of digital signal in digital circuit? It will break digital communication. But gigabit pair is connected through transformers (which are placed in RJ connector).
I just categorize digital line as a line which has a fixed valid voltage ranges for a fixed digital levels 0 and 1, other voltage levels are not allowed for digital line and should not appears for a period which is longer than some time limit which depends on digital line bandwidth. If signal doesn't fit into this scheme then it is not digital, but analog and needs to be treated with analog circuits.
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I just categorize digital line as a line which has a fixed valid voltage ranges for a fixed digital levels 0 and 1, other voltage levels are not allowed for digital line and should not appears for a period which is longer than some time limit which depends on digital line bandwidth. If signal doesn't fit into this scheme then it is not digital, but analog and needs to be treated with analog circuits.
You can categorise as you want but I'm reminded of the proud mother at her son's graduation ceremony from military college. As they all marched past during the passing out parade she turned to another lady beside her and said: "Look at that. They are all marching out of step except my son".
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I just categorize digital line as a line which has a fixed valid voltage ranges for a fixed digital levels 0 and 1, other voltage levels are not allowed for digital line and should not appears for a period which is longer than some time limit which depends on digital line bandwidth. If signal doesn't fit into this scheme then it is not digital, but analog and needs to be treated with analog circuits.
This is called a Non-return-to-zero level (NRZL) code.
Not only is it not the only digital coding scheme, it's not even the only binary digital coding scheme. For example, NRZI doesn't fit this definition, but is binary.
Digital lines convey digital data.
Analog lines convey analog data.
Both can have line codes and use modulation that changes the representation of the signals on the wire from their 'base' representation. Whether it's a simple binary NRZL or a complicated scheme like 10GBASE-T, the signal is continuous because it exists in the continuous (for our purposes) real world, and therefore needs a definition that works in the continuous domain. Either this makes all signals are analog, regardless of what they encode, or it means that what is encoded matters more than the continuous nature of the signal.
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Digital lines convey digital data.
Analog lines convey analog data.
Then, I have two questions:
1) Can you categorize output from DAC? This line (named as "analog") convey digital data which is sent on input of DAC in binary form and discrete in time.
2) Can you categorize output of ADC? These lines represented in binary form and discrete in time convey analog data which is sent on analog input of ADC.
Regarding to 1000BASE-T, it's signal is produced with DAC, analog amplifier with programmable gain and passed through transformer like usual analog line. This line cannot be processed with digital input. It needs analog signal pre-processing and then needs analog to digital transformation before it can be processed in digital domain. It transfers continuous analog signal which convey both - RX and TX digital data simultaneously. And of course it is processed with analog circuits such as amplifiers. And this is why I can't accept "digital" type for that signal line.
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Digital lines convey digital data.
Analog lines convey analog data.
While some will keep disagreeing with this, that is the only useful definition, which is why I like it. The other technically correct possibility is to define: "every physical signal is analog, the concept of digital signals does not exist at all". While possible and correct, it's stupid IMHO. What keeps amusing me is radiolistener's inability to choose either of the technically robust definitions, and instead end up with an internally incoherent opinion which he somehow fails to see even though it's so blatantly obvious to everybody else.
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every physical signal is analog, the concept of digital signals does not exist at all
there is no concept that digital signals doesn't exists at all.
The digital signal is a signal discrete in time and represented as a stream of digits, such digital signal is synchronized with master clock and needs to have valid state at the clock event. Valid state means that it should have stable and valid voltage level defined for digit in a specific digital signal standard.
On the contrary, analog signal is continuous in time and don't have valid ranges for some digit, it can have any voltage level in a working range. It also doesn't have a clock, because it is continuous.
Technically you can name one way PAM-5 stream as "digital", because it is represented as a stream of digits and discrete in time because it is synchronized with clock.
But the signal on a pair between two 1000BASE-T PHY is not just simple PAM-5 with a clock.
There are some difference:
1) there is needs digital to analog and analog to digital transformation, because PAM-5 encoding requires more than 2 voltage levels but digital domain operations can be done in a binary representation.
2) there is need to recover a clock from continuous signal representation on analog line, because there is no clock lines between two PHY
3) there is need for analog signal processing such as amplification/attenuation, analog add/subtractions, common mode currents rejection, echo cancellation, etc.
4) there are two streams on the same 1000BASE-T pair simultaneously, they flow in opposite direction and they are not synchronized with each other, so there is analog sum of two PAM-5 streams and they are clocked from different asynchronous clock sources.
As you can see, it has too many analog signal operations and the sum of all these analog signal operations cannot give you a chance to treat this signal as a simple stream of digits discrete in time. So, you cannot name it as digital.
When you saying that this line is "digital" just because it transfers digital data, this is a big simplification which omits many details which is actually very important for processing such a signal.
Another example, did you hear about HART protocol? This is a hybrid analog+digital protocol which allows to send digital data over analog 4-20 mA line which already has analog signal from analog source. Can you say that 4-20 mA analog line is digital just because it allows to transfer digital data?
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The digital signal is a signal discrete in time and represented as a stream of digits, such digital signal is synchronized with master clock and needs to have valid state at the clock event. Valid state means that it should have stable and valid voltage level defined for digit in a specific digital signal standard.
[...]
1) there is needs digital to analog and analog to digital transformation, because PAM-5 encoding requires more than 2 voltage levels but digital domain operations can be done in a binary representation.
2) there is need to recover a clock from continuous signal representation on analog line, because there is no clock lines between two PHY
The recurring logic flaw in your reasoning is the following reasoning:
Given circuit A and circuit B, if circuit A is a digital circuit and has property X, and circuit B does not have property X, then circuit B is not digital. This is a fallacy.
There are synchronous digital signals (e.g. SPI). There are also asynchronous digital signals (e.g. RS-232). There are binary digital signals, and there are also digital signals with more levels. One does not exclude the other.
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What keeps amusing me is radiolistener's inability to choose either of the technically robust definitions, and instead end up with an internally incoherent opinion which he somehow fails to see even though it's so blatantly obvious to everybody else.
I just look at it from the following point of view: this signal line cannot be generated and cannot be processed with circuit that has digital output/input. It requires digital to analog conversion and analog signal processing for generation. And it requires analog signal processing and analog to digital conversion before it can be processed as digital.
Since it cannot be generated and cannot be processed with digital circuit and requires analog signal processing with analog circuits, it is absurd to name it as digital. Isn't it? That's my point of view.
There are also asynchronous digital signals (e.g. RS-232).
RS232 can be generated and processed with digital GPIU with a proper logic-level shifters (voltage level translators).
But 1000BASE-T signal is much more complicated than RS232 and cannot be generated and processed with digital GPIO even with logic-level shifters. 1000BASE-T signal requires mandatory analog signal processing with analog circuits (analog amplification/attenuation, analog add/subtraction, common mode current rejection, echo cancellation, etc) and it requires analog-to-digital and digital-to-analog conversion before it can be processed in a digital domain. So, attempt to use analogy between RS232 and 1000BASE-T is incorrect.
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There are binary digital signals, and there are also digital signals with more levels. One does not exclude the other.
I understand your point of view, but cannot accept it as a common meaning for the term "digital".
Can you please show me the example of a clean digital circuit (not hybrid analog+digital) which uses more than two voltage levels on a digital signal line?
For example, here is the explanation of the term "digital" from dictionary:
https://dictionary.cambridge.org/dictionary/english/digital
digital
adjective
recording or storing information as a series of the numbers 1 and 0, to show that a signal is present or absent:
digital data
IT, COMMUNICATIONS
digital
adjective
using a system that can be used by a computer and other electronic equipment, in which information is sent and received in electronic form as a series of the numbers 1 and 0:
- digital content/data/information
- digital camera/photography/image
- digital television/TV/radio
- After the switchover all our TV channels went digital.
Compare
analogue
https://dictionary.cambridge.org/dictionary/english/analogue
IT, COMMUNICATIONS
analogue
adjective (US usually analog)
using a system in which information, such as sound or images, is stored or sent in a continuously changing form, such as electrical signals, radio waves, or film:
- analogue TV/radio/phone
- analogue system/signal/service
- Viewers would be forced to make the switch from analogue to digital.
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1) Can you categorize output from DAC? This line (named as "analog") convey digital data which is sent on input of DAC in binary form and discrete in time.
How the signal is generated is irrelevant. For our purposes (we are not operating in the quantum domain), all signals are continuous both in time and voltage/current/power, regardless of how they are produced. Making a distinction between a 1-bit DAC (a 'digital' output) and a 5-level DAC is a distinction without a difference. They both convert digital data to a continuous analog value on the line.
2) Can you categorize output of ADC? These lines represented in binary form and discrete in time convey analog data which is sent on analog input of ADC.
I'm not sure what you're asking, of course the output of an ADC is digital. A sampled analog signal is digital data, not analog data, that is why you need to contend with quantization and aliasing that are not present in the analog domain.
Regarding to 1000BASE-T, it's signal is produced with DAC, analog amplifier with programmable gain and passed through transformer like usual analog line. This line cannot be processed with digital input. It needs analog signal pre-processing and then needs analog to digital transformation before it can be processed in digital domain. It transfers continuous analog signal which convey both - RX and TX digital data simultaneously. And of course it is processed with analog circuits such as amplifiers. And this is why I can't accept "digital" type for that signal line.
Please define a 'digital' input in a way that doesn't invoke continuous analog properties of the signal (voltage, current, etc). A 'digital' input is just a 1-bit ADC with some hysteresis, and you absolutely can use it to extract multiple signal levels from the input with sigma-delta techniques and oversampling. We don't actually generally know how a 1000base-T PHY is implemented, since it's not relevant as long as it meets the spec, but I'd wager that sigma-delta and DSP is used much more heavily than analog signal processing. Does it mean that it is a 'digital' signal to you if it is using a 1-bit sigma-delta ADC and DSP, but an 'analog' signal if it's using a 17-level ADC? What if one link partner is using a '17-level DAC' and the other is using a sigma-delta DAC?!
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A 'digital' input is just a 1-bit ADC with some hysteresis, and you absolutely can use it to extract multiple signal levels from the input with sigma-delta techniques and oversampling.
No. ADC is a hybrid analog+digital device, it has analog input and digital output.
And you cannot do analog-to-digital conversion just by putting analog signal on a digital GPIO and by using high speed oversampling.
1-bit ADC requires mandatory feedback which needs analog operations (analog addition and analog integrator) with the input analog signal and it requires analog comparator before digital input, so this is a hybrid circuit which uses both - analog and digital circuits.
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A 'digital' input is just a 1-bit ADC with some hysteresis, and you absolutely can use it to extract multiple signal levels from the input with sigma-delta techniques and oversampling.
No. ADC is a hybrid analog+digital device, it has analog input and digital output.
And you cannot do analog-to-digital conversion just by putting analog signal on a digital GPIO and by using high speed oversampling. 1-bit ADC requires feedback which needs analog operation with the input signal and analog comparator before digital input, so this is a hybrid circuit which uses both - analog and digital circuits.
you can if you have enough noise, quite a few GPS receivers do/did that
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No. ADC is a hybrid analog+digital device, it has analog input and digital output.
And you cannot do analog-to-digital conversion just by putting analog signal on a digital GPIO and by using high speed oversampling.
1-bit ADC requires mandatory feedback which needs analog operations (analog addition and analog integrator) with the input analog signal and it requires analog comparator before digital input, so this is a hybrid circuit which uses both - analog and digital circuits.
If you do not allow analog components in the signal chain, then you are operating in a purely theoretical space that doesn't exist in the real world. All signals are analog. All electronic components are analog. 'Digital' only exists as far as we have defined line codes to give meaning to particular analog values. Whether those line codes are binary or multi-value or complicated modulations isn't really relevant. All signals are analog, ergo the only meaningful distinction between analog and digital is related to the meaning / interpretation of the signal. That you are unable to see this is kind of mind blowing.
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If you do not allow analog components in the signal chain, then you are operating in a purely theoretical space
No, I'm allow analog components in the signal chain. But if a signal chain has analog and digital components, then this is a hybrid circuit, not digital. Hybrid circuit can combine digital and analog components.
You can't name some analog signal line as digital just because this signal line is used in a hybrid circuit which consists of digital components. The same you can't name some analog signal line as digital if that signal line is used to transfer digital data over analog signal.
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If you do not allow analog components in the signal chain, then you are operating in a purely theoretical space
No, I'm allow analog components in the signal chain. But if a signal chain has analog component, then this is a hybrid circuit, not digital. Hybrid circuit can combine digital and analog components.
All components are analog. All signals are analog. What is a 'digital' component, and how does it interact with the continuous real world? Is an inverter with feedback used as an amplifier digital or analog? Why? How about in a ring oscillator? How do digital signal thresholds work, and how is this not an 'analog' circuit, since it involves 'comparing' analog voltages?
Your view is simply not compatible with real life. Either all signals are analog (because they are), or the meaningful distinction rests on what is being represented. There is no alternative that makes sense.
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All components are analog.
No, there is also digital components. They are designed to work with digital signals represented with discrete digits. The digital signal is not continuous, it has two discrete voltage levels to represent digits 0 and 1. Also digital signal is discrete in time, it should have valid and unchanged state at specific time interval determined by the the master clock signal edges. Outside of that time interval the state of the digital signal doesn't matter and can be undefined.
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Your view is simply not compatible with real life. Either all signals are analog (because they are), or the meaningful distinction rests on what is being represented. There is no alternative that makes sense.
No, my point of view is from a real life. It is not theoretical, but practical.
I think you're just don't understand the key difference between digital and analog signals, and this is why you're confuse them.
You can transfer digital data through analog line, but that analog line still remains analog.
The same you can transfer analog data through digital line, but that digital line still remains digital.
It doesn't matter what you transfer through signal line. The difference here is how data is represented on the line.
The digital line represents data as discrete digits 0 and 1 separated in time with a clock edges. You can capture analog data at discrete points, encode its voltage into binary form and transfer it through digital line as series of 0 and 1. In order to restore analog data you're needs to decode series of 0 and 1 into voltage levels at discrete points and then interpolate amplitude between these points. Digital signal carries limited amount of information.
Analog line has a different data representation. It has continuous wave, and each point of that wave carries information, there is no discrete digits and no discrete points in analog signal. Analog signal carries infinite amount of information.
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There is no such thing as "infinite amount of information" since information is entropy and entropy is a finite quantity determined by chemistry and physics. In any analog signal transmission there is inevitably noise and distortion and these limit the amount of information the signal contains.
You also cannot really "transfer analog data through digital line", since as you said, any information must be encoded as bits to be transferred, and at that point it ceases to be analog. In a similar manner, we can see that digital data must be encoded as waves to be transferred over analog lines: the shape of those waves can be selected based on the fidelity of the channel, which is called the coding efficiency.
This was all worked out by Claude Shannon 70 years ago.
People forget what the "analog" term really means. An analogy is a concept that has a similar structure to another concept, to aid in understanding how that structure works. (Before it was banned for PC reasons, the section of the Scholastic Aptitude Test that was most correlated with IQ was the analogies.) An analog variable has a structure similar to a physical quantity. For example, the structure of an analog audio signal is similar to the physical displacement of a microphone diaphragm.
In modern practice, many of the interconnections in use today are no longer strictly digital. For example, the PCIe and DDR interconnects require SERDES blocks at either end, which are used to encode bits into packets of self-clocked data and condition their analog waveshape. Increasingly, digital channels at the board level are going away.
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No, there is also digital components. They are designed to work with digital signals represented with discrete digits. The digital signal is not continuous, it has two discrete voltage levels to represent digits 0 and 1. Also digital signal is discrete in time, it should have valid and unchanged state at specific time interval determined by the the master clock signal edges. Outside of that time interval the state of the digital signal doesn't matter and can be undefined.
Please explain how logic thresholds are not 'analog' in your view of the world, and how adding a third (or 2048th) threshold changes the fundamental nature of the signal. How do you explain voltage drop and fanout. If I connect TTL logic to CMOS logic, is it still digital, despite them not agreeing on the 'discrete' voltages? If I use an ADC to sample a 'digital' signal for some reason, and decode it in DSP, has it become analog?
Is an NRZ-I signal digital to you? How about a Manchester code? Neither seem to fit your prior definition. Does your definition allow line coding at all, like 8b10b? How about a differential signal that uses two physical lines? What about some of the other goofy stuff that's done, like using pulse lengths to encode digital data?
i don't think I am the one that is confused here...You do realize that both time and any signal value are continuous in reality, and that until you get to quantum effects, nothing is discrete, right?
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There is no such thing as "infinite amount of information" since information is entropy and entropy is a finite quantity determined by chemistry and physics.
if it's finite, then what is the quantum of time, what is the quantum of voltage and what is the quantum of frequency?
it's impossible to capture analog signal with all details, because it requires storage with infinite capacity to store such signal representation. The noise in analog signal is also a part of information.
With digital signal you can do that, you can capture it and replay it again with all details.
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Please explain how logic thresholds are not 'analog' in your view of the world
The digital signal is digital not because there is logic thresholds, but because it is discrete and represents data in a form of binary digits. The digital signal is discrete in amplitude and discrete in time. It is not continuous like analog one. The logic threshold just define valid range for discrete level. The same there is time threshold which define time interval when digital signal is valid.
The digital component is intended to work with discrete binary digits.
The analog component is intended to work with continuous waves...
Is an NRZ-I signal digital to you?
yes, it is digital, because it is discrete in amplitude - logic 0 or 1 and discrete in time.
How about a Manchester code?
it also digital, becuase it is discrete in amplitude - logic 0 or 1 and discrete in time. Despite the fact that it don't use plain clock, it still has some clock with constraints.
For comparison 1000BASE-T is analog sum of two PAM5 streams (RX and TX) clocked form two different and async clocks.
And each of PAM5 streams can have 5 levels, which is also not digital according to the definition of the term "digital" from the cambridge dictionary which I quoted above (digital signal is represented with two levels 1 or 0).