adc opamp frontend

[5282]

hi,
1-why ADC op-amp use -5v 0v +5v supply power why not use single supply??
2-the -5v 0v +5v  connected to low voltage 3v ADC that's mean more op-amp gain can damage the high cost ADC ?

[rstofer]

You can buy single supply op amps, they are all over the place.  You can, in fact, use any dual supply op amp in a single supply configuration.

One thing you need to watch out for with single supply op amp circuits is how you bias the signals to get the op amp up into the middle of its range (if your input is actually AC).

With the lower supply voltages, you will need to make certain you buy rail-to-rail input/output op amps.

Google for "Op Amps For Everyone" and read chapter 4.

[5282]

You can buy single supply op amps, they are all over the place.  You can, in fact, use any dual supply op amp in a single supply configuration.

One thing you need to watch out for with single supply op amp circuits is how you bias the signals to get the op amp up into the middle of its range (if your input is actually AC).

With the lower supply voltages, you will need to make certain you buy rail-to-rail input/output op amps.

Google for "Op Amps For Everyone" and read chapter 4.

1-thank you i will use it with  ADC so the single supply will be same as  dual supply ?
2-the ADC is 3v and op-amp may damage ADC if i make wrong gain with an input ??

[danadak]

In CMOS if you exceed ~ 1 diode drop beyond either supply rail, you can trigger
a parasitic SCR internal to CMOS structure, that in turn shorts internally the
supply rails and usually blows open the bond wires for Vcc/Vdd and Vss.

https://en.wikipedia.org/wiki/Latch-up

If the SCR not triggered you can still damage the parasitic diode internal to CMOS
with excess current, depends on the source that is driving the pin, eg. its current
capability.

You can add external schottky diodes at pin, and a series R to pin from source voltage being
measured to protect against over voltage, and excessive loading of OpAmp output.
Or a voltage divider to scale the input. Note if you add series R that may effect A/D
conversion settling time for its input sampler, so be aware of speed you run it at.

Some methods of offsetting inputs.     https://www.dropbox.com/s/k1yn4m7heaixvmg/ADinput%20negative%20inputs.zip?dl=0

Regards, Dana.

[5282]

In CMOS if you exceed ~ 1 diode drop beyond either supply rail, you can trigger
a parasitic SCR internal to CMOS structure, that in turn shorts internally the
supply rails and usually blows open the bond wires for Vcc/Vdd and Vss.

https://en.wikipedia.org/wiki/Latch-up

If the SCR not triggered you can still damage the parasitic diode internal to CMOS
with excess current, depends on the source that is driving the pin, eg. its current
capability.

You can add external schottky diodes at pin, and a series R to pin from source voltage being
measured to protect against over voltage, and excessive loading of OpAmp output.
Or a voltage divider to scale the input. Note if you add series R that may effect A/D
conversion settling time for its input sampler, so be aware of speed you run it at.

Some methods of offsetting inputs.     https://www.dropbox.com/s/k1yn4m7heaixvmg/ADinput%20negative%20inputs.zip?dl=0

Regards, Dana.

thank you