I missed the fact that you were designing for OTG - in that case, yes, it is necessary and prudent to protect the ID pin as well.
Here's some more ESD info, from my experience: I completely expect that any wire that leads from inside the device to outside the device will experience an ESD event at some point, and during the design stage all wires leading to outside the device should be assessed for their protection from these events, and if not able to withstand the event, should be remedied with protective devices.
The schematic from AlfBaz is really good, but it should have the ID pin protected as well. If this device has a physical metal chassis I would only add that the shields (all shields) go to the chassis, which also should go to protective earth ground. PCB's in plastic or metal enclosures powered from wall plug packs don't really have a protective ground; in this case you add an earth ground terminal on the outside of the box for hookup to earth ground .This would be necessary for devices that are expected to live in a harsh environment, an also just prudent to provide a good path for the dissipation of ESD events.
One good design practice (if you have the room for it) is to have a chassis ground ring around your pcb, on all layers, stitched top to bottom, every 15mm or so. All of the chassis connectors and the ESD protection diodes for incoming signals will ground to this chassis ground ring. Then, at just one point only, this is connected to your digital ground, usually at the power supply with a very wide trace. I've seen it done in the manner you've drawn it in your schematic, using a .01 or .1uF and a 1M bleeder, but this seems counter-productive to me. Why go to the trouble of isolating the grounds only to try to couple them together again with some form of RLC network. It seems far better, in my opinion, to maintain the separate islands (ground domains) and connect them together with a low impedance path at one point only. The goal is to keep ESD currents separate from signal currents and separate from low noise analog currents, etc. This shield ground around the board can also help reduce edge radiated EMI. However, in order to keep options open, you can provide unpopulated pads in a few places around the board to connect the chassis ground to the signal ground using ferrite beads, 0-ohms, or capacitors for high speed coupling. This may be necessary if you are doing EMC compliance testing, you might need to change the grounding scheme to meet compliance. It's somewhat of a black art, so good to keep options open.
Regarding the MOV's to your digital ground, I've never done it like this, but my past work has always been industrial and I've always had a real earth ground to go to, so in my case I would send charge through MOVs to earth ground. In your case, I would just connect the USB diodes directly to chassis ground, I don't think the MOVs are necessary between chassis ground and signal ground. Also the PRTR5V0U2X has a zener from power to ground too, where you have put a MOV. It won't hurt, but it may not be necessary. The inclusion of the MOVs on your schematic has chassis ground basically floating, with the 1M bleeder to prevent any charge build up. Its not bad. It's one way of doing it too.
Finally, I've not seen any 3-channel USB protection in other than BGA or CSP. There is a 4 channel device, PRTR5V0U4D, it comes in SC-74/TSOP6 which is not too bad. You can use a 4-channel device to protect D+, D-, ID, with one spare, and also the zener from VBUS to GND
If you have 2 USB ports with ID, you can use (3) two channel devices, for a total of 6 channels, or a 4 channel and a 2 channel device.
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