FETs are voltage controlled devices?

[Starlord]

Perhaps you could explain in a little more detail what you're doing. What micro, what type of FET you have selected, etc..

All the details are in the first post.  It's a microcontroller which doesn't have 5V tolerant inputs, and the circuit is for selecting between VIN or USB power, with support for USB OTG where the uC may need to manually override the ID pin and connect VIN to the USB bus.  The original circuit used a PFET and buffer.  But I believe the original schematic is in error because the buffer selected does not have 5V tolerant outputs when powered with 3.3V, as it is.  As such I believe the 5V pullup will eventually destroy it.  I considered replacing it with a translator with dual supplies and therefore 5V tolerant outputs, but it's twice as expensive, and it seems crazy to use that when for slightly more than a single PFET I could use a part like this:

http://www.diodes.com/datasheets/DMC2038LVT.pdf

Which has a PFET and NEFT and costs only slightly more than the PFET alone.

Plus, I'm a stubborn asshole and I want to understand how to use mosfets properly.  A few cents savings be damned.

(Also for the purposes of this exercise I can't invert the logic on the uC's pin, so I can't use the NFET in a normal low-side configuration.)

[Monkeh]

All the details are in the first post.  It's a microcontroller which doesn't have 5V tolerant inputs

What microcontroller? You say it doesn't have 5V tolerant inputs, I say it's likely it can sink 17uA.. so, what microcontroller?

The original circuit used a PFET and buffer.  But I believe the original schematic is in error because the buffer selected does not have 5V tolerant outputs when powered with 3.3V, as it is.  As such I believe the 5V pullup will eventually destroy it.

I believe otherwise, but you may have difficulties depending on the FET.. which is why I asked what FET.

[tron9000]

is it the concept of Vgs that's bothering you?

If the uC pin goes to 0V then you have 3.3V across the resistor R1 that goes between the MOSFETs Gate & Source, which means Vgs = 3.3V, MOSFET conducts. this means that the MOSFET then SINKS the 5V side to 0V too through the uC pin that is at 0V.

Imagine that this circuit where the 3.3V signal is grounded

its a similar thing, the uC is not seeing the 5V signal when in this situation. The point at 5V signal will be 0V from the uC IO.

And vice versa. when uC IO goes 3.3V again, the voltage across R1 (Vgs) is = 3.3V(uC) - 3.3V(pull up supply) = 0V - no conduction, no current flow through FET, 5V signal is allowed to float to 5V by pull up R2.

I hope I made it clearer?

[edavid]

We know the mosfet must be on and in a low resistance state, because otherwise the microcontroller could not pull the 5V side down when it's pin goes LOW.  The mosfet's resistance and the pullup form a voltage divider, and the drain pin is the point between them we tap and connect to he PFET.  For that point to be near 0V, the mosfet MUST be almost fully on, with a resistance of less than a few ohms.

I'm commenting on the BS170 circuit shown a few posts up, which is a standard level shifter.

The MOSFET is not like a resistor.  As the source voltage rises, V_GS drops and the resistance increases; it is approximately infinite at V_GS = 0.

Going back to the original circuit, I think that the 74LVC1G125 output is 5V tolerant in the off state, although that's not specified in the datasheet.

[Starlord]

All the details are in the first post.  It's a microcontroller which doesn't have 5V tolerant inputs

What microcontroller? You say it doesn't have 5V tolerant inputs, I say it's likely it can sink 17uA.. so, what microcontroller?

It can sink quite a bit more than 17uA, but the pins are still rated for only 3.3V and I see no mention of clamping diodes:
http://www.atmel.com/Images/Atmel-42181-SAM-D21_Datasheet.pdf

[Monkeh]

It will have clamping diodes.

More to the point, you don't even need them. Pull the FET up to +3.3V (forget the buffer). Use a pFET with a threshold of -2V or worse, which turns on acceptably at -4.5Vgs. No buffer, no current flowing through protective diodes.

Use a current limiting resistor on the gate.

[Starlord]

Pull the pFET up t 3.3V?

That's one of the first solutions I considered.  I was told when I asked here in another thread about this that I couldn't do that. That the FET wouldn't turn on fully.

https://www.eevblog.com/forum/projects/usb-power-supply-selector/msg672644/#msg672644

You can not use you MCU pin, unless it supports open drain output, because 5V-3.3V=1.7V, many fets will conduct at Vgs=-1.7V.

[Monkeh]

Which is why I said to pick one with a threshold of -2V. Yes, they exist, I went looking earlier and found hundreds.

E: Take a look at, say, this one: http://www.digikey.com/product-detail/en/AO4425/785-1026-1-ND/1855968

Vgs minimum -2V, max -3V, theoretically <50mOhm at -4.5V. Simple enough to test. No 5V pullup needed.

For more headroom, 100k pullup to 5V, 10k series between pin and gate. Minimum leakage current, -1.3Vgs or so when high.

[AndreasF]

Replace the mosfet in this picture with a resistor:


When the uC pin is set low, the mosfet turns on and it becomes a hopefully, very low value resistor. 

Now I've got a 5V pullup connected to my 3V microcontroller pin.  And everything I know says that will destroy my microcontroller.  Even with that 3.3V pullup there pulling the voltage down slightly.

Let's go with your analogy of the MOSFET being a low value resistor )let's say 0.1 Ohm). In this case we can forget the gate altogether and the pull-up to 3.3 as well. Setting the uC pin low would be equivalent with connecting it to ground via a fairly low resistor (lets say 50 Ohm). So you have:

GND -- [ 50 Ohm] --- uC-pin --- [MOSFET, 0.1 Ohm] --- [4.7kOhm] --- 5V

This is a classic voltage divider circuit, with the voltage at the uC pin being much much closer to GND (approx. 10mV) than to 5V (or 3.3V if you include the other pull-up as well).

[Starlord]

Which is why I said to pick one with a threshold of -2V. Yes, they exist, I went looking earlier and found hundreds.

That's great, but "You can not use you MCU pin, unless it supports open drain output," seems pretty cut and dry.  I assumed if they said I cannot use my MCU pin it meant there was some other issue with using one with a lower threshold that I didn't understand.

And did you not just say:

Also, you should stop asking people questions if they say things like "if the gate is at 3.3V then the source will never see more than 3.3V.".

He said it wouldn't work, I stopped asking questions about it.

For more headroom, 100k pullup to 5V, 10k series between pin and gate. Minimum leakage current, -1.3Vgs or so when high.

Huh?

http://www.savagecircuits.com/content.php?85-Mixed-Voltage-Systems-Interfacing-5V-and-3-3V-Devices

Series Resistor Interface
A series resistor is sometimes used to interface 5V/3.3V devices, however it is important to understand that not all devices can be connected in this manner. This type of interface requires the 3.3V device to have protection from over-voltage on the I/O pins. This is done using clamping diodes which are designed to limit the input voltage to ~3.3V. These clamping diodes are pretty robust, however they are not meant to continuously sink large amounts of current. The series resistor limits the current across the clamping diode so that it is not permanently damaged.

Figure 2 shows a series resistor interfacing 5V and 3.3V devices. The value of R1 is based on the current capability of the clamping diodes.



Not all 3.3V devices are able to be connected in this manner. If your device does not include clamping diodes you should not use a series resistor to interface to the 5V signal. While the 3.3V device may appear to function, it will eventually fail from electrical stress.

Is a 5V pullup with 100K and 10K resistors between it and my pin not a series resistor interface?

[Starlord]

GND -- [ 50 Ohm] --- uC-pin --- [MOSFET, 0.1 Ohm] --- [4.7kOhm] --- 5V

This is a classic voltage divider circuit, with the voltage at the uC pin being much much closer to GND (approx. 10mV) than to 5V (or 3.3V if you include the other pull-up as well).

Huh?  So I DON'T need  clamping diodes, or a level shifter, or a voltage divider on a 3V microcontroller pin if I want to read 5V logic?  All I need is a resistor, and that's fine?

I've spent all week on this problem and read so many web pages about level shifting methods and I haven't seen any mention of a simple resistor being good enough UNLESS there were also clamping diodes on the pins.

I thought sinking 5V to a 3.3V micrcontroller, even through a current limiting resistor was bad unless it's pins were 5V tolerant. :/

[Monkeh]

And what makes you certain you don't have clamp diodes?

[Starlord]

And what makes you certain you don't have clamp diodes?

Because I haven't seen any mention of them in the datasheet and haven't found any diagram of the port with them in place, and the datasheet specifies 3.6V as the absolute max?

[Monkeh]

And what makes you certain you don't have clamp diodes?

Because I haven't seen any mention of them in the datasheet and haven't found any diagram of the port with them in place, and the datasheet specifies 3.6V as the absolute max?

No, it specifies 3.8V max for Vdd, and pin voltage as GND -0.3V to Vdd +0.3V.

Try a test. Take a nice high value resistor, and connect a GPIO pin to +5V with it. Drive the GPIO high. Check the voltage on the pin.

If it's not ~350mV above Vdd and being clamped, you win.

[Starlord]

No, it specifies 3.8V max for Vdd, and pin voltage as GND -0.3V to Vdd +0.3V.

But I'm not supplying Vdd with 3.8V, I'm supplying it with 3.3V.  So the absolute max for the pin is 3.6V.

[Monkeh]

No, it specifies 3.8V max for Vdd, and pin voltage as GND -0.3V to Vdd +0.3V.

But I'm not supplying Vdd with 3.8V, I'm supplying it with 3.3V.  So the absolute max for the pin is 3.6V.

Yes, I can do simple addition too.

Ask yourself what happens beyond that point. You're still below the absolute max for the chip, so why is the max input voltage always +/- 0.3V? Because there are diodes clamping to the rails.

[Starlord]

Yes, I can do simple addition too.

Ask yourself what happens beyond that point. You're still below the absolute max for the chip, so why is the max input voltage always +/- 0.3V? Because there are diodes clamping to the rails.

I can ask myself what happens till the cows come home and it won't do any good because I don't know anything about what the limitations of the silicon are or why those limits exist or are different from chip to chip. 

Why's the limit +-0.3V?  You want me to guess?  I would have guessed it's to prevent current from flowing somewhere it shouldn't because it's too high relative to Vcc.  But that doesn't mean it's caused or limited by clamping diodes.  Also, if there were clamping diodes and the pins were 5V tolerant, you'd think Atmel would advertise that since it would sell more chips.  But I can't find a single mention of diodes or 5V tolerance in the datasheet.

Furthermore, without any actual electrical specs, I don't know how much current said diodes can actually sink, so I can't count on them.  You said I should try it and see if it works.  But you seem to be a smart fellow who knows more about this than I do.  So why is it you're suggesting that when you know it's possible to exceed a rating without immediately destroying a chip, only to have it fail later for unknown reasons?  This isn't some one off project, this is a microcontroller circuit I'm going to use in lots of things I build.  I don't want to have random failures happening that I can't trace the cause of.   

[Monkeh]

Also, if there were clamping diodes and the pins were 5V tolerant, you'd think Atmel would advertise that since it would sell more chips.

They're not 5V tolerant, if they were you wouldn't need to limit the current with a resistor for the diodes to safely clamp..

Furthermore, without any actual electrical specs, I don't know how much current said diodes can actually sink, so I can't count on them.  You said I should try it and see if it works.

We are talking a few tens of microamps. The diodes should handle that without a problem.

But you seem to be a smart fellow who knows more about this than I do.  So why is it you're suggesting that when you know it's possible to exceed a rating without immediately destroying a chip, only to have it fail later for unknown reasons?  This isn't some one off project, this is a microcontroller circuit I'm going to use in lots of things I build.  I don't want to have random failures happening that I can't trace the cause of.   

Then let's wait for someone else to come along and say a few microamps of current won't cause harm.

You could also ask Atmel to clarify their incomplete datasheets.

[Starlord]

http://www.avrfreaks.net/forum/input-protection-diodes-atmel-port-pins

Taking the side of evil here:

If you put a 1M resistor between the port pin and the 9v input, the protection diode will conduct less than 9uA and keep the input pin from going above VCC+0.5v.

Not sure I'd do it for anything I wanted to put in customer's hands.

The Lawson is spot on,you should get more respect for operating the uC within its specification.There is nothing wrong with modifying the design and its OK to make mistakes as we learn from these.You dont want to apply 9V directly to the I/O pins even through a resistor. The protection diodes are unlikely to respond quick enough to prevent the i/o circuitry seeing out-of spec voltage.

This is why I have trust issues. 

Well, that and spending a week trying to find an alternative solution after someone told me I could not drive my PFET with a 3.3V uC pin.

[LvW]

The question concerns the OHMIC region only (and not the saturation region) - and this region is not correctly shown in the graph.

The question?  You mean my question? 
Why does my question concern the OHMIC region only?  The FET I'm using is logic level, and Vth is way below the 3.3V which will be applied at the gate when the FET is on and the uC pin is pulling the source low.  I would expect the FET to be in full saturation.

Sorry for my late answer - yes, starlord you are right. I did read "voltage controlled resistor" instead of "... devices". Sorry.
Nevertheless, my comment is valid: The shown input-output characteristics do NOT belong to a FET but to a bipolar transistor.

[Starlord]

Well, crap.  I've just been going over the circuit again and I found a problem.

When Vin is powered, the FET turns off.  But this doesn't disconnect Vin from the USB supply entirely - the body diode of the FET can still conduct.  And that means the USB port could potentially charge my battery.  Which would be bad if the battery voltage is less than the 5V USB supply, which it will most likely be.

I also can't simply stick a diode on Vin to fix the problem because my voltage regulator has a maximum drop of 250mV, and a schottky has a voltage drop of around 350-500mV.  So if I'm powering the circuit with a LiPo, that's 3.7V nominal, and I'm down to 2.95V coming out of my regulator.

I see they did something weird on the SamD21 Xplained Pro board with two PFETs back to back:
http://www.atmel.com/Images/Atmel-42220-SAMD21-Xplained-Pro_User-Guide.pdf
http://www.digikey.com/product-detail/en/IRLML6402TRPBF/IRLML6402PBFCT-ND/812500

But I don't know where to start figuring out how that works. 

And they're using these NFETs to invert the logic on the ID pin:
http://www.digikey.com/product-detail/en/2N7002DW/2N7002DWCT-ND/1785790

[Monkeh]

It seems to me you've found your circuit.

Back to back pFETs, to get around body diode conduction, pulled to +5V so you don't need to worry about threshold voltage, two nFETs as a level shifter (two stages so the output is not inverted).

Pretty much what the first reply to the thread suggested as far as driving the pFETs.

Low parts count and minimal engineering effort required.

[Starlord]

It seems to me you've found your circuit.

Back to back pFETs, to get around body diode conduction, pulled to +5V so you don't need to worry about threshold voltage, two nFETs as a level shifter (two stages so the output is not inverted).

Pretty much what the first reply to the thread suggested as far as driving the pFETs.

Low parts count and minimal engineering effort required.

Except I don't have a 5V supply on Vin.  Vin could be anywhere from 3.5-6.5V.

And I suspect I can't simply pull the FETs up to the USB supply because that will change the behavior of the circuit.

And now I've gone from a circuit that used a buffer and one FET with two pullups to using four FETs and three pullups and I'm sure there's got to be a simpler way of doing this.

[Monkeh]

It seems to me you've found your circuit.

Back to back pFETs, to get around body diode conduction, pulled to +5V so you don't need to worry about threshold voltage, two nFETs as a level shifter (two stages so the output is not inverted).

Pretty much what the first reply to the thread suggested as far as driving the pFETs.

Low parts count and minimal engineering effort required.

Except I don't have a 5V supply on Vin.  Vin could be anywhere from 3.5-6.5V.

Which only matters if you try and connect a USB host to the port with Vin too low. In which case, well.. I suggest you shouldn't do so. Alternatively we could go back to the high threshold FETs.

And now I've gone from a circuit that used a buffer and one FET with two pullups to using four FETs and three pullups and I'm sure there's got to be a simpler way of doing this.

This IS the simple way. It is a bog standard every day circuit. The parts are cheap, small, and common. Good grief, don't look inside an IC if you think this isn't simple.

I am beginning to think you may need a dentist.

[Starlord]

Which only matters if you try and connect a USB host to the port with Vin too low. In which case, well.. I suggest you shouldn't do so. Alternatively we could go back to the high threshold FETs.

Don't you mean low threshold FETs?

It's confusing using terms like high and low when talking about negative voltages.  Do you mean fets with a Vth of < -4.5V?  Or < -2V?

Either way, I think I found a problem with the earlier circuit when using FETs that have too negative a threshold voltage.  For example, if Vin is only 3.6V, and I pull the gate down to enable USB OTG, Vgs will only reach -3.6V, so a Vth of -4.5V won't work.

This IS the simple way. It is a bog standard every day circuit. The parts are cheap, small, and common. Good grief, don't look inside an IC if you think this isn't simple.

And yet, we've seen it's possible to make a non-inverting level shifter using a single FET, but this circuit uses two.

Using four transistors where only two would suffice is bad design.  If only because it wastes precious space on the PCB and increases your BOM and placement costs.