Author Topic: First 4 Layer PCB: Traces on each layer a good idea?  (Read 8093 times)

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Offline balage

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Re: First 4 Layer PCB: Traces on each layer a good idea?
« Reply #50 on: July 26, 2020, 11:36:00 am »
Dave noticed why big crystal is put on the PCB. Actually I am now designing a PCB on which (almost) everything is SMD. Trying to make as dense as I can.

But I have not found a 4,096MHz crystal only the regular low profile one. Maybe soFPG didn't as well. Maybe size depend on the freq.
 

Online Siwastaja

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Re: First 4 Layer PCB: Traces on each layer a good idea?
« Reply #51 on: July 26, 2020, 12:00:04 pm »
Dave giving very outdated and thus wrong advice sidetracked this discussion

What part of my advice was "outdated and wrong"?

The claim that assembly would cost more, or you would need to find a specific assembly house to do the job, is wrong. This is not the case anymore, haven't been for years. Obviously, $1000 DIY P&P machines may have problems doing it reliably, but the same machines struggle with doing even 0603 or 0.5mm QFP reliably, or work at all without glitches, so are pretty useless.

The claim that 0402 is difficult in prototyping is not wrong per se, just quite iffy because most people I have dealt with (many beginners), especially younger people, have absolutely no problem after the initial shock; it's highly personal. One needs to ignore the Internet comments on this specific matter, and honestly try before deciding for themselves.

Obviously, you are correct that you can do the job with 0805. You can do it with 1206 or even THT disc ceramics, very likely. You can also do it with 01005 parts. 0805 being "practical" in this case, I almost disagree. It's quite far from being a good match. It's acceptable, yes.

As we already have a design which does not have any show-stopper problems, it should be obvious we are discussing optimizing the design so that the future designs can be even better - better being quicker time-to-market, lower cost, less EMI, larger power integrity margins, etc. The capacitor package size hence is not critical. I thought this would be obvious.

Small components tend to pay off even if miniatyrization isn't strictly needed, because more often than not, you are still limited to a certain fixed maximum dimension, and saving space on frustrating necessary but "extra" parts like bypass caps, pullup/series resistors or point-of-load voltage regulators saves that space for other things. My initial prototypes often have many tightly packed modular areas, with empty area inbetween, so I can move the modular sections for the final product without having to reroute half of the board as would be the case if I had filled the board evenly with maximum size of components for "easy assembly". And it's quite typical a few modifications or additions come up, so it's nice to have some real estate free at that point.

So well yeah, if I have a massive D2PAK 100A FET, having a 1210 cap next to it makes sense; I likely need large capacitance there, and the component sizes are balanced.

But if I have a 0.5mm pitch BGA, say an imager chip or an FPGA or modern MCU, I definitely do not put a 1210 cap next to it, nor do I use a D2PAK voltage regulator to supply 10mA of 3.3V for it, I use the smallest regulator package I can deal with without extra cost / extra struggle, and currently that is 0.5mm pitch parts, and 0402 for passives.
« Last Edit: July 26, 2020, 12:16:33 pm by Siwastaja »
 
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Offline tooki

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Re: First 4 Layer PCB: Traces on each layer a good idea?
« Reply #52 on: July 26, 2020, 12:12:18 pm »
Dave noticed why big crystal is put on the PCB. Actually I am now designing a PCB on which (almost) everything is SMD. Trying to make as dense as I can.

But I have not found a 4,096MHz crystal only the regular low profile one. Maybe soFPG didn't as well. Maybe size depend on the freq.
Then you didn’t look very hard. Digi-Key alone has 14 different 4.096MHz SMD crystals in stock right now.

(Note that Dave didn’t say it was big, he just said it was odd that it wasn’t SMD.)
« Last Edit: July 26, 2020, 12:13:57 pm by tooki »
 

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Re: First 4 Layer PCB: Traces on each layer a good idea?
« Reply #53 on: July 26, 2020, 01:41:00 pm »
Dave giving very outdated and thus wrong advice sidetracked this discussion

What part of my advice was "outdated and wrong"?

The claim that assembly would cost more, or you would need to find a specific assembly house to do the job, is wrong. This is not the case anymore, haven't been for years. Obviously, $1000 DIY P&P machines may have problems doing it reliably, but the same machines struggle with doing even 0603 or 0.5mm QFP reliably, or work at all without glitches, so are pretty useless.

I know for a fact that places that do hand assembling (very useful for small and or quick turn runs) often charge more for 0402's as they are more fiddly.
I also know for a fact that many assembly houses will ask for more spare 0402 parts over larger ones due to a larger loss rate.
I also know for a fact that many assembly houses will have older lines that can do 0402's but they hit higher loss targets with 0603 and above.

Just because you are not dealing with these places does not mean they do not exist.

Quote
The claim that 0402 is difficult in prototyping is not wrong per se

End of discussion.

Quote
Obviously, you are correct that you can do the job with 0805. You can do it with 1206 or even THT disc ceramics, very likely. You can also do it with 01005 parts. 0805 being "practical" in this case, I almost disagree. It's quite far from being a good match. It's acceptable, yes.

Glad you agree.

Quote
As we already have a design which does not have any show-stopper problems, it should be obvious we are discussing optimizing the design so that the future designs can be even better - better being quicker time-to-market, lower cost, less EMI, larger power integrity margins, etc. The capacitor package size hence is not critical. I thought this would be obvious.

It is obvious.

Quote
But if I have a 0.5mm pitch BGA, say an imager chip or an FPGA or modern MCU, I definitely do not put a 1210 cap next to it, nor do I use a D2PAK voltage regulator to supply 10mA of 3.3V for it, I use the smallest regulator package I can deal with without extra cost / extra struggle, and currently that is 0.5mm pitch parts, and 0402 for passives.

The 0.5mm pitch BGA is required for technical reasons. Matching tiny size 0402 caps may not be required for technical reasons. if you don't have a required technical reason and you just want to use 0402 "just because", then knock yourself out. But don't say it's wrong or "outdated" to use larger parts in this case when clearly there is no obsolete technical requirement to do so.
 
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Offline dietert1

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Re: First 4 Layer PCB: Traces on each layer a good idea?
« Reply #54 on: July 26, 2020, 02:00:10 pm »
Some years ago for a board shrink we replaced a conventional 6 MHz crystal from EPSON in a 6 x 3 mm can by a much smaller 4 MHz Murata ceramic resonator. Those are usually much better than their specification and perfect for many applications. I remember in my research i also found a Swiss company offering very small 4 MHz crystals (true crystals) with a different resonance mode, but that was a specialty product and expensive in comparison.

Regards, Dieter
 

Online asmi

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Re: First 4 Layer PCB: Traces on each layer a good idea?
« Reply #55 on: July 26, 2020, 02:01:44 pm »
I know for a fact that places that do hand assembling (very useful for small and or quick turn runs) often charge more for 0402's as they are more fiddly.
I also know for a fact that many assembly houses will ask for more spare 0402 parts over larger ones due to a larger loss rate.
I also know for a fact that many assembly houses will have older lines that can do 0402's but they hit higher loss targets with 0603 and above.

Just because you are not dealing with these places does not mean they do not exist.
Easy. Just don't use these ancient places, so they will upgrade or die. There are plenty of others who don't do this shit.
 
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Online asmi

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Re: First 4 Layer PCB: Traces on each layer a good idea?
« Reply #56 on: July 26, 2020, 02:07:44 pm »
True, but OTOH, if you don't need controlled impedance on all routing layers, and don't have high-speed edge rates, you can treat it as three signal layers. Then you have only one pair where the ground layer is "right next" allowing impedances between 50-100 ohms without massively thick traces, and 2 of the signal layers are "lower speed" layers, with the respective ground layer quite far away. But it's still just about a millimeter or so; these "slow" layers are then equivalent to what you have in the sole signal layer of the plain old double layer design when you use one side as a ground plane; quite good actually!

This 3 signal layers, 1 ground layer is still massively better than trying to have some clever routing on all 4 layers, accidentally (or purposefully) chopping up the sole ground plane.
The problem with that approach is not only the lack of ground plane, but also close proximity of 3rd and 4th layers (prepreg typically is very thin), which leads to broadside coupling and consequently serious crosstalk. This is especially so since FPGA IO cells typically have very sharp edges (because they are designed for high speed).
Also, since OP is saying this project is a testing ground for higher-end design, it's best to learn the right way of doing things right from the get go. Doing this shit for hi-speed is going to bite you in no time flat.
 
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Offline balage

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Re: First 4 Layer PCB: Traces on each layer a good idea?
« Reply #57 on: July 26, 2020, 02:33:04 pm »
Dave noticed why big crystal is put on the PCB. Actually I am now designing a PCB on which (almost) everything is SMD. Trying to make as dense as I can.
But I have not found a 4,096MHz crystal only the regular low profile one. Maybe soFPG didn't as well. Maybe size depend on the freq.
Then you didn’t look very hard. Digi-Key alone has 14 different 4.096MHz SMD crystals in stock right now.
(Note that Dave didn’t say it was big, he just said it was odd that it wasn’t SMD.)

Here they all need the same footprint area: https://www.digikey.com/products/en/crystals-oscillators-resonators/crystals/171?k=&pkeyword=&sv=0&sf=0&FV=69%7C409393%2Cmu4.096MHz%7C2150%2C-8%7C171&quantity=&ColumnSort=0&page=1&stock=1&pageSize=25

So blueskull has the truth; the frequency limits the size:
Wave propagation speed is a given constant for a given material, and times of reflection is given for a specific process tolerance, so the larger the material is, the longer the total time it takes to bounce over the entire material for a given certain times, thus lower the frequency.

Therefore, the smaller the size is, the higher the minimum frequency a crystal can be made with, for a given technology platform, tolerance and cost constraint set.
 

Offline T3sl4co1l

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Re: First 4 Layer PCB: Traces on each layer a good idea?
« Reply #58 on: July 26, 2020, 05:19:03 pm »
I have no problem finding watch crystals in even smaller packages... :popcorn:

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Offline tooki

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Re: First 4 Layer PCB: Traces on each layer a good idea?
« Reply #59 on: July 26, 2020, 06:02:42 pm »
Dave noticed why big crystal is put on the PCB. Actually I am now designing a PCB on which (almost) everything is SMD. Trying to make as dense as I can.
But I have not found a 4,096MHz crystal only the regular low profile one. Maybe soFPG didn't as well. Maybe size depend on the freq.
Then you didn’t look very hard. Digi-Key alone has 14 different 4.096MHz SMD crystals in stock right now.
(Note that Dave didn’t say it was big, he just said it was odd that it wasn’t SMD.)

Here they all need the same footprint area: https://www.digikey.com/products/en/crystals-oscillators-resonators/crystals/171?k=&pkeyword=&sv=0&sf=0&FV=69%7C409393%2Cmu4.096MHz%7C2150%2C-8%7C171&quantity=&ColumnSort=0&page=1&stock=1&pageSize=25

So blueskull has the truth; the frequency limits the size:
Wave propagation speed is a given constant for a given material, and times of reflection is given for a specific process tolerance, so the larger the material is, the longer the total time it takes to bounce over the entire material for a given certain times, thus lower the frequency.

Therefore, the smaller the size is, the higher the minimum frequency a crystal can be made with, for a given technology platform, tolerance and cost constraint set.
As I said right in my reply to you: Dave did not comment on the size of the crystal. He commented on it being through-hole and not SMD. SMD ≠ smaller!!! (SMD is often smaller, but it’s no requirement.)
 

Online asmi

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Re: First 4 Layer PCB: Traces on each layer a good idea?
« Reply #60 on: July 26, 2020, 06:18:53 pm »
As I said right in my reply to you: Dave did not comment on the size of the crystal. He commented on it being through-hole and not SMD. SMD ≠ smaller!!! (SMD is often smaller, but it’s no requirement.)
I would add that in most cases crystal can be replaced by MEMS oscillator, which are much smaller, so their higher price will be offset by PCB area savings in tight designs. This is especially so for 6+ layer boards, as they get rather pricey with size increase, so there is a strong incentive to pack things as tight as possible. Yet another reason to choose 0402 over larger packages :horse:
« Last Edit: July 26, 2020, 06:26:15 pm by asmi »
 
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Offline Mattylad

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Re: First 4 Layer PCB: Traces on each layer a good idea?
« Reply #61 on: July 26, 2020, 09:46:53 pm »
It's been a few years and apart from what Dave has said:

If those capacitors are MLCC and they are at the edge of the board then they are at risk of being cracked during handling, especially if the board is clipped into a plastic molding.
Moving them further away from the edge and being perpendicular to the most likely direction of flexing is better.

The caps/resistors above 33 IC on the right - what the hecks going on there?
Your tracks are going through too close to the opposing nets pad, if you have to go through the middle of a components pads (and you often do not on this board) then at least go through the middle.

I guess we all look forward to the next version after you have taken all the comments into consideration.


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Re: First 4 Layer PCB: Traces on each layer a good idea?
« Reply #62 on: July 27, 2020, 12:08:08 am »
I know for a fact that places that do hand assembling (very useful for small and or quick turn runs) often charge more for 0402's as they are more fiddly.
I also know for a fact that many assembly houses will ask for more spare 0402 parts over larger ones due to a larger loss rate.
I also know for a fact that many assembly houses will have older lines that can do 0402's but they hit higher loss targets with 0603 and above.
Just because you are not dealing with these places does not mean they do not exist.
Easy. Just don't use these ancient places, so they will upgrade or die. There are plenty of others who don't do this shit.

Ancient?
You do know that even the most modern PnP machines have heads that have an 0402 threshold, right?
https://www.hawkerrichardson.com.au/images/resources/Electronic_Production_Equipment/Surface_Mount_Machines/SEBMB16400-00_ZTAR_E.pdf
Certain lines might already be set up for the larger component heads etc.
And because these machines are huge investment, there are still tons of older machines that potentially give better yield for parts larger than 0402.
At least it's potentially something to consider.

And there is nothing at all "ancient" about hand assembly for short runs.

Again, if you have no technical or other requirement to go 0402, why do so? "Just because"? Ok, knock yourself out.
 
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Offline -gb-

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Re: First 4 Layer PCB: Traces on each layer a good idea?
« Reply #63 on: July 27, 2020, 02:20:55 am »
Greetings again. So i gave it a try.  I needed just one trace on another layer. Layer 2 is GND, Layer 3 in 2V8.
Yes, right i did not length-match but ... the whole pcb is 2" x 1" large, the traces from the Imagesensor are <<5 cm which is < 200 ps. In comparison the Clock is 24 MHz max.
All passives are 0603 except the 1uF (0805), the two 22uF (0805) and the inductor (1210). The crystal is now smd 3.2mm x 2.5mm.
Very thin traces were only used when necessary.

Good night from Germany/Bavaria.
« Last Edit: July 27, 2020, 02:26:58 am by -gb- »
 
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Offline T3sl4co1l

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Re: First 4 Layer PCB: Traces on each layer a good idea?
« Reply #64 on: July 27, 2020, 03:46:31 am »
Greetings again. So i gave it a try.  I needed just one trace on another layer. Layer 2 is GND, Layer 3 in 2V8.
Yes, right i did not length-match but ... the whole pcb is 2" x 1" large, the traces from the Imagesensor are <<5 cm which is < 200 ps. In comparison the Clock is 24 MHz max.
All passives are 0603 except the 1uF (0805), the two 22uF (0805) and the inductor (1210). The crystal is now smd 3.2mm x 2.5mm.
Very thin traces were only used when necessary.

Good effort!

The long trace wrapping around the SOIC pad, I think I would've just routed straight line; two vias added, who cares, shorter trace length.

I think the bypassing and vias I would've done slightly differently, just more consistently really I think -- the QFN20? is fantastic, lots of grounds and vias and bypass caps right there.  The FPGA, the top-right pins (the two mismatched caps) have lots of vias, more than needed really, but well bypassed and tied to plane.  The other four bypasses (or pairs) are weaker, with only 1-3 vias each.

Hrm, I guess it hasn't been mentioned yet, but a TVS on the USB would be a good idea -- deals with hot-plugging the +5V, which the bypass cap can multiply and may not be the healthiest for the regulator or whatever's wired to the header.  Can be a pass-thru type that includes filtering, series resistance and pull-up/downs for the USB pair too (if the USB interface needs it; obviously not in this case(?)), or just the one diode.

Of course ESD protection, and series resistors, should be placed on the FPGA-to-header traces, if employing this degree of hardening.  Maybe ferrite beads or other filtering too, suitable for application.  Not really important until it becomes a quantity product, in which case those headers might disappear anyway.

The nearly single layer layout gives an even more interesting potential, that it could be 2-layer; again the JLC limitation pops up, but there are other and better fabs out there, come on... ;)  In that case, the 2.8V can be routed point-to-point on the bottom (mostly), and the ample bypass caps will cover things just fine.  One or two lossy bulk caps should be added at the end of the 2.8V route, to terminate the PDN.  Top and bottom ground poured and stitched.

Also with a 2-layer design, I think I might prefer to put more signals on the bottom side, at least just for escape -- that way the top copper, and +2.8V, can have better access to power pins.  The added trace length is inconsequential.

Alternately, or, probably jointly, really: bypass caps can be removed, for example the bottom three VCC pins on the FPGA can probably all run from the same subnet with just one cap shared between them, and similarly for the top group.  The supply ripple would increase only marginally (unless I'm very wrong with my guess at current draw of these chips!), and that can be dealt with, externally, by putting extra filtering around the I/O (USB and headers?).  A cost optimization that's rare enough in production, but likely doable if it were to come up.

0402s (or smaller) would of course also come up in production, and yeah, anyone who's going to charge more to assemble cheaper components, they just don't win the quote, duh. :-DD

Also, er... the lack of designators (silk), which makes talking about this rather difficult! :scared: (Unless that was just turned off for clarity? Except kinda not, y'know?, but whatever.)

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Offline james_s

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Re: First 4 Layer PCB: Traces on each layer a good idea?
« Reply #65 on: July 27, 2020, 04:01:10 am »
Certain lines might already be set up for the larger component heads etc.
And because these machines are huge investment, there are still tons of older machines that potentially give better yield for parts larger than 0402.
At least it's potentially something to consider.

And there is nothing at all "ancient" about hand assembly for short runs.

Again, if you have no technical or other requirement to go 0402, why do so? "Just because"? Ok, knock yourself out.

There is another factor worth considering, at least for decoupling applications. It is reasonably well known that MLCC capacitors lose capacitance when there is DC across them and I recall reading that this is largely dependent on physical size. A physically smaller capacitor will lose more capacitance than a larger one, all else being equal.
 
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Offline KE5FX

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Re: First 4 Layer PCB: Traces on each layer a good idea?
« Reply #66 on: July 27, 2020, 04:07:42 am »
Again, if you have no technical or other requirement to go 0402, why do so? "Just because"? Ok, knock yourself out.

When component shortages hit the MLCC sector, as they did over the last couple of years, the manufacturers focus on smaller parts that their customers use in volume.  0603 MLCCs were getting very hard to find for a while, never mind 1206 and 0805. 

The truth is that there are more MLCC form factors than the market really requires.  0603 should probably just go away.  0402 occupies a sweet spot between size, performance, and cost.

And yes, any assembly house that can't deal with 0402, or that charges more for doing so, isn't worth considering under any circumstances.
 
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Offline soFPG

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Re: First 4 Layer PCB: Traces on each layer a good idea?
« Reply #67 on: July 27, 2020, 08:47:13 am »
Quote
The nearly single layer layout gives an even more interesting potential, that it could be 2-layer; again the JLC limitation pops up, but there are other and better fabs out there, come on...
JLCPCB is pretty much the cheapest with the best capabilities. The only other one with slightly better tolerances is WellPCB but they would charge 30$ for 5 pieces + expensive DHL shipping to Germany.
No reason why I wouldn't choose 4L JLCPCB for 5€ + 5€ shipping.

Quote
Greetings again. So i gave it a try.
Thanks, very good layout. I guess I need (a lot) more practice. But what I probably should have mentioned is the M12 mount for a lens which makes placement of components slightly more complicated.
 

Offline -gb-

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Re: First 4 Layer PCB: Traces on each layer a good idea?
« Reply #68 on: July 27, 2020, 10:12:45 am »
Quote
I guess I need (a lot) more practice.

Indeed, practice can and should only be replaced by more practice.

Quote
But what I probably should have mentioned is the M12 mount for a lens

Do you have a link for the footprint? With double-sided-load the board can be shrinked to the size of the lense mount + headers and usb. I would try an area-optimised version.
 

Offline soFPG

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Re: First 4 Layer PCB: Traces on each layer a good idea?
« Reply #69 on: July 27, 2020, 12:38:09 pm »
Only in Altium Design Format. Don't know how easy it is to convert to Eagle.
 

Online asmi

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Re: First 4 Layer PCB: Traces on each layer a good idea?
« Reply #70 on: July 27, 2020, 05:05:55 pm »
And there is nothing at all "ancient" about hand assembly for short runs.
I do hand assembly myself, and have exactly zero problems manually placing/soldering 0402s. My recent customer's board had over 200 of 0402s, and I didn't have any troubles with assembling it manually. It was on a larger side, but typically my board would have 100-150 of 0402s and even some 0201s for FPGA decoupling. Once you practice a bit (and with right equipment), they are just as easy to place as any other parts.

Again, if you have no technical or other requirement to go 0402, why do so? "Just because"? Ok, knock yourself out.
I go for 0402 because 1) they are cheap, 2) they occupy small PCB area, and 3) they are great for decoupling. By now I have quite an extensive inventory of various 0402 parts, as I buy them by reels (because of 1.). I only go for larger package 1) when value/voltage rating is too large for 0402, 2) when resistor's power dissipation exceeds what 0402 can handle, and 3) when I know in advance I will need to repeatedly desolder-resolder parts during bring up (like feedback resistors for DC-DC converters) - this is because 0603 and larger usually have markings on them, while 0402 almost never have it. In case of 3) I use 0805 just because I happen to have 1% resistor kits of that size with a ton of different values, which I bought a long time ago. If it wouldn't be for that, I'd probably go for 0603 now - again, for markings.
 
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Offline -gb-

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Re: First 4 Layer PCB: Traces on each layer a good idea?
« Reply #71 on: July 27, 2020, 06:16:07 pm »
Hello again (-:

Quote
With double-sided-load the board can be shrinked to the size of the lense mount + headers and usb. I would try an area-optimised version.

Done.

- passives 0402 mostly
- removed planes under the inductor
- doublesided load
- 0.9" x 0.6"
- changed the usb IC to CP2102N
- removed some Rs and Cs in the case where two supply pins are next to each other, used larger cap values instead (100n -> 1u).
- sensor on underside, with mount shown. center of the sensor area is in the center of the pcb/M12 lense mount. see: http://www.zokete.com/storages/images/files/GC0307%20CSP%20SPEC%201.6.pdf

Feel free to use and discuss.
« Last Edit: July 27, 2020, 07:07:05 pm by -gb- »
 
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Online asmi

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Re: First 4 Layer PCB: Traces on each layer a good idea?
« Reply #72 on: July 28, 2020, 12:40:11 am »
Done.
You will probably want to pull USB connector closer to the edge so that the line marked "PCB Edge" would actually be on the edge. Otherwise looks good to me on a first sight.

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Re: First 4 Layer PCB: Traces on each layer a good idea?
« Reply #73 on: July 28, 2020, 03:08:24 am »
Hello again (-:

Quote
With double-sided-load the board can be shrinked to the size of the lense mount + headers and usb. I would try an area-optimised version.

Done.

- passives 0402 mostly
- removed planes under the inductor
- doublesided load

Why go to double sided load?
Sure, if you need the form factor or electrical requirements, fine. But you didn't seem to need it before, so why now?
Fine if it's a one-off or low volume run of course, not big deal. But you usually don't just go to double sided load for no reason.
 

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Re: First 4 Layer PCB: Traces on each layer a good idea?
« Reply #74 on: July 28, 2020, 03:16:18 am »
And there is nothing at all "ancient" about hand assembly for short runs.
I do hand assembly myself, and have exactly zero problems manually placing/soldering 0402s. My recent customer's board had over 200 of 0402s, and I didn't have any troubles with assembling it manually. It was on a larger side, but typically my board would have 100-150 of 0402s and even some 0201s for FPGA decoupling. Once you practice a bit (and with right equipment), they are just as easy to place as any other parts.

Assembly houses that offer hand assembly services have highly optimised time/cost processes and will often charge a premium for 0402 parts.
Why? Because they have actually run the metrics and got the data on how long it takes. Smaller parts are more fiddly and take more time.

Look, I'm not anti-0402 or saying that it's not easy, I'm just pointing out facts as I have seen in the industry, and you may want to consider that when choosing 0402 parts.
Again, just because others have not encountered this does not mean there is no potential penalty for going to 0402 parts.
And saying "well, just don't use those companies that charge more for them" is entirely missing the point that such cost differences exist for practical reasons.
Assembly companies are infamous for doing whatever you want and secretly hiding the cost from you. They won't tell you you are secretly paying a premium for 0402 parts, or that piss-poor panel layout, or *insert any other production related thing here*.
 
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