Op Amp as comparator not behaving as expected

[Peeps]

I wanted to use an op-amp to buffer a 0 to 5V 25khz PWM signal. I thought this would be simple: Put a 2.5V reference on the -v input and run my pulse signal into the +v input but I was so wrong.

LTSpice tells me it should work fine. The op-amp is an LF412CN. The math makes sense. Vout = A(v+ - v-), so when the pulse is > 2.5V the output should go high and when its <2.5 it should go low. Instead the output just stays high. In fact heres what I found after a lot of head scratching:

In the non inverting config, when my reference voltage is between 0 and 5V the output stays high. Beyond 5V the output follows the input. It's like completely backwards.

If I reverse the pins, so its in an inverting configuration, the output follows the input for vref of 0.7V to 2.0V. Then from 2 to 5V the output stays low, then beyond 5V it goes high. Only the last part makes any sense to me.

My op-amp is being supplied single rail, 12V.

[tron9000]

that doesn't sound like a buffer, that sounds like a comparator.

Diagram? If you have it in LTspice then its a screenshot away.

[Peeps]

Heres the schematic. It will be driving a PMOS but for the sake of testing I've taken it out.

[Zero999]

I wanted to use an op-amp to buffer a 0 to 5V 25khz PWM signal. I thought this would be simple: Put a 2.5V reference on the -v input and run my pulse signal into the +v input but I was so wrong.

LTSpice tells me it should work fine. The op-amp is an LF412CN. The math makes sense. Vout = A(v+ - v-), so when the pulse is > 2.5V the output should go high and when its <2.5 it should go low. Instead the output just stays high. In fact heres what I found after a lot of head scratching:

In the non inverting config, when my reference voltage is between 0 and 5V the output stays high. Beyond 5V the output follows the input. It's like completely backwards.

If I reverse the pins, so its in an inverting configuration, the output follows the input for vref of 0.7V to 2.0V. Then from 2 to 5V the output stays low, then beyond 5V it goes high. Only the last part makes any sense to me.

My op-amp is being supplied single rail, 12V.

This is not an op-amp buffer but a comparator circuit.

Of course this won't work. The common mode range of the LF412 is being exceeded, resulting in phase inversion, i.e. the functions of the inverting and non-inverting pins exchanging. The LF412 needs both of its inputs to be around 3V above the negative rail to work properly, otherwise it will behave erratically.

The LF412 is completely the wrong IC for this application. Apart from the common mode range issue, stated above, it's too slow and can't provide enough output current to charge/discharge the MOSFET gate quickly enough. Use a proper MOSFET driver, such as the MCP1416 or MC33152.

[Peeps]

I wanted to use an op-amp to buffer a 0 to 5V 25khz PWM signal. I thought this would be simple: Put a 2.5V reference on the -v input and run my pulse signal into the +v input but I was so wrong.

LTSpice tells me it should work fine. The op-amp is an LF412CN. The math makes sense. Vout = A(v+ - v-), so when the pulse is > 2.5V the output should go high and when its <2.5 it should go low. Instead the output just stays high. In fact heres what I found after a lot of head scratching:

In the non inverting config, when my reference voltage is between 0 and 5V the output stays high. Beyond 5V the output follows the input. It's like completely backwards.

If I reverse the pins, so its in an inverting configuration, the output follows the input for vref of 0.7V to 2.0V. Then from 2 to 5V the output stays low, then beyond 5V it goes high. Only the last part makes any sense to me.

My op-amp is being supplied single rail, 12V.

This is not an op-amp buffer but a comparator circuit.

Of course this won't work. The common mode range of the LF412 is being exceeded, resulting in phase inversion, i.e. the functions of the inverting and non-inverting pins exchanging. The LF412 needs both of its inputs to be around 3V above the negative rail to work properly, otherwise it will behave erratically.

The LF412 is completely the wrong IC for this application. Apart from the common mode range issue, stated above, it's too slow and can't provide enough output current to charge/discharge the MOSFET gate quickly enough. Use a proper MOSFET driver, such as the MCP1416 or MC33152.

Well thats very interesting, thanks...I was hoping to just use whatever I had laying around here to make this circuit. I tried a bunch of different op-amp models in LTSpice and they produced the desired results but I guess the simulation isn't good enough.

[Zero999]

I wanted to use an op-amp to buffer a 0 to 5V 25khz PWM signal. I thought this would be simple: Put a 2.5V reference on the -v input and run my pulse signal into the +v input but I was so wrong.

LTSpice tells me it should work fine. The op-amp is an LF412CN. The math makes sense. Vout = A(v+ - v-), so when the pulse is > 2.5V the output should go high and when its <2.5 it should go low. Instead the output just stays high. In fact heres what I found after a lot of head scratching:

In the non inverting config, when my reference voltage is between 0 and 5V the output stays high. Beyond 5V the output follows the input. It's like completely backwards.

If I reverse the pins, so its in an inverting configuration, the output follows the input for vref of 0.7V to 2.0V. Then from 2 to 5V the output stays low, then beyond 5V it goes high. Only the last part makes any sense to me.

My op-amp is being supplied single rail, 12V.

This is not an op-amp buffer but a comparator circuit.

Of course this won't work. The common mode range of the LF412 is being exceeded, resulting in phase inversion, i.e. the functions of the inverting and non-inverting pins exchanging. The LF412 needs both of its inputs to be around 3V above the negative rail to work properly, otherwise it will behave erratically.

The LF412 is completely the wrong IC for this application. Apart from the common mode range issue, stated above, it's too slow and can't provide enough output current to charge/discharge the MOSFET gate quickly enough. Use a proper MOSFET driver, such as the MCP1416 or MC33152.

Well thats very interesting, thanks...I was hoping to just use whatever I had laying around here to make this circuit. I tried a bunch of different op-amp models in LTSpice and they produced the desired results but I guess the simulation isn't good enough.

It's not so much the simulation program, but the models used, which are just approximations and take various short-cuts to improve speed.

The issue becomes apparent when looking at the schematic of the LF412 input stage. No detailed knowledge of differential amplifiers is necessary. The only thing one needs to know is that J-FET's gate is a reverse biased diode, which shouldn't be forward biased.  Focus on J2, the +input. When the gate is above the drain voltage (as is the case when the op-amp is working properly), increasing the gate voltage further results in a lower drain current. If the input voltage is taken too low, i.e. below the drain voltage, the gate junction will become forward biased and the drain current will flow out of the gate. Now the situation is reversed, reducing the gate voltage, will reduce the drain current, as more of the drain current is taken out of the gate.
http://www.ti.com/lit/ds/symlink/lf412-n.pdf

The TL072 is similar to the LF412. When I had a problem with the model not replicating reality, I made my own, using the data sheet schematic.
https://www.eevblog.com/forum/projects/better-ltspice-tl072-model/msg1003677/#msg1003677

What components do you have handy? Do you have some BJTs?

[w2aew]

Well thats very interesting, thanks...I was hoping to just use whatever I had laying around here to make this circuit. I tried a bunch of different op-amp models in LTSpice and they produced the desired results but I guess the simulation isn't good enough.

Models are generally not build to cover operation outside of normal operating conditions. They will generally not properly model things like operation outside of the the input common mode range, operation with power supplies outside of the specified range, phase reversal issues, etc. 

Another simple example - a simulator won't have any problem putting 100A through a 1N914A diode - it doesn't know that you'd let the smoke out of it.

A simulator is a tool like any other - it is important to understand what it can do, and what it can't do - because if you ask it to do something that it can't do, it won't tell you it can't, it'll just lie to you.

[GerryBags]

There are quite a few editions of The Bob Pease Show, on Texas Instruments' YouTube channel, where he outlines why he was not a fan of Spice simulations, and a common refrain is "it tells lies!". The analog and digital worlds don't really mesh too well, and modelling the non-linearities of analog systems on a digital computer is where things fall down.

'm just starting to learn about analog computing, but it seems that trying to model a digital system with one would be equally hard. They had hybrid systems with digital sections on a mainly analog machine, and strangely, as Moore's law looks to be about to hit the molecular limit for transistor sizes, they are already looking at analog again. I didn't get it until recently, but that is apparently just what a quantum computer is, or an optical / photonic computer: analog!

have a look at this page for a demonstration of how cool it can be: http://www.glensstuff.com/

P.s.: Alan, if you catch this, could I put in a request for a video? I'd love you to do a segment on the Chua Diode, a non-linear resistor that can be modelled with op amps, and the chaotic oscillator circuit that uses it. The double scroll attractor looks amazing fed to the X and Y inputs of a 'scope and I know that my tentative grasp of what is going on with it would become much firmer once you've explained it to me. It's the Gerry off YT, btw. I'm a big fan of your channel 

[Peeps]

The issue becomes apparent when looking at the schematic of the LF412 input stage. No detailed knowledge of differential amplifiers is necessary. The only thing one needs to know is that J-FET's gate is a reverse biased diode, which shouldn't be forward biased.  Focus on J2, the +input. When the gate is above the drain voltage (as is the case when the op-amp is working properly), increasing the gate voltage further results in a lower drain current. If the input voltage is taken too low, i.e. below the drain voltage, the gate junction will become forward biased and the drain current will flow out of the gate. Now the situation is reversed, reducing the gate voltage, will reduce the drain current, as more of the drain current is taken out of the gate.
http://www.ti.com/lit/ds/symlink/lf412-n.pdf

The TL072 is similar to the LF412. When I had a problem with the model not replicating reality, I made my own, using the data sheet schematic.
https://www.eevblog.com/forum/projects/better-ltspice-tl072-model/msg1003677/#msg1003677

What components do you have handy? Do you have some BJTs?

Thanks for the explanation, this makes sense looking at it in detail. I'll probably use that model in future projects too. I have many common models of NPN and PNP in TO-92 packages.

I realized I also have a few LM311 comparators I had ordered for possible use in something. The only problem is I don't see a logical way of using it to drive the PMOS...like I could have the output as a common emitter but the RC of the resistor and PMOS capacitance destroys the square wave.

[Zero999]

The issue becomes apparent when looking at the schematic of the LF412 input stage. No detailed knowledge of differential amplifiers is necessary. The only thing one needs to know is that J-FET's gate is a reverse biased diode, which shouldn't be forward biased.  Focus on J2, the +input. When the gate is above the drain voltage (as is the case when the op-amp is working properly), increasing the gate voltage further results in a lower drain current. If the input voltage is taken too low, i.e. below the drain voltage, the gate junction will become forward biased and the drain current will flow out of the gate. Now the situation is reversed, reducing the gate voltage, will reduce the drain current, as more of the drain current is taken out of the gate.
http://www.ti.com/lit/ds/symlink/lf412-n.pdf

The TL072 is similar to the LF412. When I had a problem with the model not replicating reality, I made my own, using the data sheet schematic.
https://www.eevblog.com/forum/projects/better-ltspice-tl072-model/msg1003677/#msg1003677

What components do you have handy? Do you have some BJTs?

Thanks for the explanation, this makes sense looking at it in detail. I'll probably use that model in future projects too. I have many common models of NPN and PNP in TO-92 packages.

I realized I also have a few LM311 comparators I had ordered for possible use in something. The only problem is I don't see a logical way of using it to drive the PMOS...like I could have the output as a common emitter but the RC of the resistor and PMOS capacitance destroys the square wave.

Another transistor is required to pull the MOSFET's gate voltage up to +V.

Here's the simplest way to do it. Q1 is an emitter follower and when Q2 is off, R1 pulls up Q1's base to +12V and the MOSFET's gate is connected to +V. When Q2 is turned on Q1's base is shorted to 0V and the MOSFET's gate is connected to 0V via D1 and Q2. The voltage on the MOSFET's gate is the inverse of the input voltage. Q2 can be the transistor inside a comparator, such as the LM393,  but bear in mind the current will be much lower, leading to slow on times for a P-channel MOSFET.



Here's a more complex solution. Q3 and Q4 are in common base configuration with their bases held at 2.5V, by R3, R4 & C1. R1 and R2 discharge the bases of Q1 and Q2. R5 limits the base current to Q1 and Q2. When the input is taken 0.6V below 2.5V, 1.9V, Q3 turns on, causing current to flow through Q1's base, Q3, R5 and back to 0V via the input.  Q1 will be on, taking the gate voltage high. When the input is taken 0.6V above 2.5V, 3.1V, Q3 will turn off, Q4 and Q2 will turn on, taking the MOSFET's gate low. In this circuit the gate voltage is non-inverting and it's faster than the previous circuit.

[tron9000]

Very interesting Circuit Hero999.

Never quite understood the applications of the common base configuration much, this has helped me also.

[exe]

Another simple example - a simulator won't have any problem putting 100A through a 1N914A diode - it doesn't know that you'd let the smoke out of it.

I think there are simulators that can produce some warnings. Unfortunately, all what I could google cost money. Still, many simulators can calculate dissipated power. I don't have LTSPice at hand, but I'll try your circuit at home to see if it can at least indicate how much power it will dissipate (accessible via pressing ALT + mouse click).

[Old Printer]

Hero999

Could I ask what software you did those circuits in?  Thanks

[Zero999]

Very interesting Circuit Hero999.

Never quite understood the applications of the common base configuration much, this has helped me also.

The key thing to remember is BJTs turn on when the potential difference across the base-emitter junction exceeds a diode drop. Unlike common emitter, common base is non-inverting and faster, as the base is at a fixed voltage, bypassed with a capacitor (low impedance at high frequencies), negative feedback via the base-collector capacitance is minimised.

Another simple example - a simulator won't have any problem putting 100A through a 1N914A diode - it doesn't know that you'd let the smoke out of it.

I think there are simulators that can produce some warnings. Unfortunately, all what I could google cost money. Still, many simulators can calculate dissipated power. I don't have LTSPice at hand, but I'll try your circuit at home to see if it can at least indicate how much power it will dissipate (accessible via pressing ALT + mouse click).

Yes it's possible to calculate power dissipation using LTSpice and energy too, which is often more important.

I have used a simulator which would "blow up components" when the maximum rating was exceeded, but it was rubbish, because it didn't take into account that most components can handle higher peak currents, than their continuous maximum rating, so that feature got turned off.

Hero999

Could I ask what software you did those circuits in?  Thanks

LTSpice, which is s free download.

[Old Printer]

Hero999

Could I ask what software you did those circuits in?  Thanks

LTSpice, which is s free download.
[/quote]

Thanks, time I gave it a good look.