Author Topic: FPGA stopwatch  (Read 795 times)

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Offline kishoresTopic starter

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FPGA stopwatch
« on: May 26, 2019, 12:05:13 pm »
Hi ,
I am from microcontroller background delving into FPGAs . I am trying to implement a seconds stopwatch and show the output on LEDs in binary. I have implemented a seconds counter . However , I am having trouble with the stopwatch.
Code: [Select]
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
use IEEE.NUMERIC_STD.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
-- Uncomment the following library declaration if instantiating
-- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;

entity counter is
    Port ( clk : in  STD_LOGIC;
  switch:in STD_LOGIC;
  --inp:in STD_LOGIC;
           leds : out  STD_LOGIC_VECTOR (7 downto 0));
  --leds : out STD_LOGIC);
end counter;

architecture Behavioral of counter is
signal count : STD_LOGIC_VECTOR(25 downto 0) := (others=>'0');
signal second :STD_LOGIC_VECTOR(7 downto 0) := (others =>'0');
signal startTime:STD_LOGIC_VECTOR(7 downto 0) := (others => '0');
signal endTime:STD_LOGIC_VECTOR(7 downto 0) := (others => '0');
begin

--Challenge 2:Switch timer
myprocess:process(clk,switch)
begin
if(rising_edge(clk)) then
if(count = 50e6) then
second <= second + 1;
count <= (others => '0' );
else
count <= count + 1;
end if;
end if;
if(switch = '1') then
startTime <= second;
endTime <= (others => '0') ;
else
endTime <= second;
endTime <= endTime - startTime;#not concurrent behaviour
end if;

end process;
leds <=endTime;

By definition a statements inside 'if' statements are concurrent but I doubt that is what is going on .
Also I am getting plenty of latch and combinatorial loop errors . What am I doing wrong?
 

Offline Dave

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Re: FPGA stopwatch
« Reply #1 on: May 26, 2019, 02:19:16 pm »
Replace:
Code: [Select]
endTime <= second;
endTime <= endTime - startTime;#not concurrent behaviour

With:
Code: [Select]
endTime <= second - startTime;

You're currently trying to set endTime to be two things at the same time.
<fellbuendel> it's arduino, you're not supposed to know anything about what you're doing
<fellbuendel> if you knew, you wouldn't be using it
 

Online rstofer

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Re: FPGA stopwatch
« Reply #2 on: May 26, 2019, 02:55:18 pm »
I think your if (switch = '1') stuff needs to be clocked if startTime is to be remembered.
 

Online rstofer

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Re: FPGA stopwatch
« Reply #3 on: May 27, 2019, 04:31:51 pm »
If you are still having problems, you might Google for 'FPGA Stopwatch Project'  There are many!
 


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