Gain of error amplifier in discrete voltage regulator

[Riggs]

Greetings!

I've been working on building a discrete voltage regulator centered on a differential amplifier/differential pair. I am however stuck on some theoretical aspects.

Having asked around and researched it a bit, it seems that the differential amplifier can be thought of as a single stage transconductance amplifier, having a large input resistance, as well as a big output resistance. Comparing the bare long tail pair with a simplified version of an op amp I notice that there are several stages missing, lack of a miller integrator etc.

The basic design of a series pass voltage regulator includes a voltage reference, an error amplifier, the feedback network and a pass transistor. The pass transistor together with the feedback resistors form a buffer with low output resistance.

The error amplifier can be either a transconductance amplifier, or an op amp. Both will be buffered by the pass transistor. I select the transconductance amplifier and an NPN as pass transistor, like shown below.

When asked what the open loop amplification of the error amplifier is, what will I answer?
a) the voltage gain of the differential amplifier i.e. gm * Rout
b) something else (perhaps taking the pass transistor to be part of the error amplifier??)

My main sources of information are:
Circuit analysis: https://ee.kpi.ua/~yv/edu/ep/book/Gray_Forth_Edition.pdf (pages 288 - 293)
Simple op amp circuit: https://slideplayer.com/slide/17577620/
Simple OTA: https://people.engr.tamu.edu/spalermo/ecen474/lecture10_ee474_simple_ota.pdf

Thanks!

[magic]

a) is right if Rout consists of both Q2/Q9 collector resistance and Q12 base input resistance, which is determined by external loading.

Without load, the base goes up and down freely and gain is limited by Q2/Q9.
With 7.5kΩ load as shown, base input resistance is β·7.5kΩ.
With 10Ω it's β·10Ω.
If the output is shorted, voltage gain at Q12 base is very low and at Q12 emitter is exactly zero

[Riggs]

I am afraid I am quite dense, I apologize.

So the input resistance of Q12 is:

$$r_{\pi}+ \left(\beta + 1\right)\cdot \left(R_{2}+R_{3}\right)$$.

 The differential amp centered on Q2 and Q9 is loaded by this input resistance. The output resistances of Q2 and Q9 will be of the form:

$$\frac{V_{A}}{I_{C}}$$

Right?

Also, I came across this document, which has a vaguely similar circuit presented at page 49: https://www.diva-portal.org/smash/get/diva2:1073421/FULLTEXT01.pdf#page=49

Though, I don't quite understand the formula presented at point (4.3).

[magic]

Not sure why gm1/4 rather than gm1/2, but the next ugly term is simply the parallel combination of Rc and the sum of intrinsic and external emitter resistance at the power device, multiplied by β or β+1. The final term (on the 2nd line) appears to account for gain reduction due to non-zero output resistance of the emitter follower, i.e. follower's voltage gain being less than unity.

[Riggs]

Interesting.

Would the circuit of the voltage regulator be a type of series-shunt feedback amplifier? Such that the output impedance of the circuit is
$$\frac{\frac{1}{g_{m,12}}||\left(R_{2}+R_{3}\right)}{\left(1+\frac{R_{3}}{R_{3}+R_{2}}\cdot A_{OL}\right)}$$?

Is this approach correct?

[Ian.M]

You appear to be using LTspice.   It is possible to instrument your sim using Tien's method to get the loop gain allowing it to be plotted vs frequency at whatever DC bias point your sim is actually operating at. The loop gain of a regulator circuit is likely to vary significantly with the load current and will vary with the load's impedance. The basic method can be found in LTspice example Educational\LoopGain2.asc and details of how to use it, a convenient Tien probe, and references for the theory and technical background can be found at https://sites.google.com/site/frankwiedmann/loopgain

[Riggs]

Thank you, but I think you might be overestimating my LTspice abilities .