Pre-regulator voltage

[TheHolyHorse]

So I'm working on a linear PSU with a pre regulator to increase efficiency. But I'm not sure how much higher the pre regulator should regulate. Using a PNP transistor it will be about 0.6V (or whatever the voltage drop is across the emitter and base) above the output voltage.

What are the benefits of higher pre regulator voltage? Will it regulate better with a slightly higher voltage across the pass transistor? Or will it just cause more heat in the pass transistor with no benefit?

[bob91343]

I don't see how a preregulator can increase efficiency.

The main reason to use a preregulator is to reduce stress on the regulator and perhaps give it less variation to deal with to improve regulation for extreme load currents.

[Doctorandus_P]

Of course a (switching) pre-regulator can increase efficiency. Especially when there is a big variation in output voltage, such as with a 0 to 30V lab power supply.

The simplest switching pre-regulator would be a few relays to switch between transformer taps, but that's not the point here, so I'll assume a SMPS (module).

The voltage drop over the post regulator is not a constant. Usually the needed voltage differential is higher when more output current is needed. It also depends on how the output stage is built. If it's a single NPN voltage follower, then it could be a few hundred mV, especially if the regulation stage of the power supply gets some higher voltage from the front of the pre-regulator to get the base voltage of the transistor a bit higher. If the output stage has a darlington, a higher voltage drop is needed.

With a "low-drop" topology with an PNP transistor or P-channel MOSfet you can get a lower voltage differential, but these have a much greater risk of instabilities, and will require more development time, and have no big benefit in this application, as you have plenty of voltage available to "waste" some in the regulator.

As a general rule of thumb probably between 3V and 5V will be enough, but you'll be better of to take this just as an initial guideline and make it adjustable in your prototype, and then do some real measurements (or start with spice). If you measure the output voltage with your scope in AC coupling mode and mV sensitivity, you'll see soon enough when your regulator starts loosing regulation.

As said before, you will have to repeat this measurement under different load conditions to make sure it performs adequately under all load conditions. A special case here is if the load current on the output is suddenly increased. If your SMPS module can not increase the current fast enough then it will have a short voltage dip and the post regulator will temporarily loose regulation.

You can easily measure these things by having a (smallish) base load on the output of your regulator, and then switch in a big power resistor with a MOSfet and a NE555 or function generator.

[TheHolyHorse]

Of course a (switching) pre-regulator can increase efficiency. Especially when there is a big variation in output voltage, such as with a 0 to 30V lab power supply.

The simplest switching pre-regulator would be a few relays to switch between transformer taps, but that's not the point here, so I'll assume a SMPS (module).

The voltage drop over the post regulator is not a constant. Usually the needed voltage differential is higher when more output current is needed. It also depends on how the output stage is built. If it's a single NPN voltage follower, then it could be a few hundred mV, especially if the regulation stage of the power supply gets some higher voltage from the front of the pre-regulator to get the base voltage of the transistor a bit higher. If the output stage has a darlington, a higher voltage drop is needed.

With a "low-drop" topology with an PNP transistor or P-channel MOSfet you can get a lower voltage differential, but these have a much greater risk of instabilities, and will require more development time, and have no big benefit in this application, as you have plenty of voltage available to "waste" some in the regulator.

As a general rule of thumb probably between 3V and 5V will be enough, but you'll be better of to take this just as an initial guideline and make it adjustable in your prototype, and then do some real measurements (or start with spice). If you measure the output voltage with your scope in AC coupling mode and mV sensitivity, you'll see soon enough when your regulator starts loosing regulation.

As said before, you will have to repeat this measurement under different load conditions to make sure it performs adequately under all load conditions. A special case here is if the load current on the output is suddenly increased. If your SMPS module can not increase the current fast enough then it will have a short voltage dip and the post regulator will temporarily loose regulation.

You can easily measure these things by having a (smallish) base load on the output of your regulator, and then switch in a big power resistor with a MOSfet and a NE555 or function generator.

Thanks for the answer, I guess I'll just add some resistors to set a gain to select the voltage differential (I guess this is the correct term).

Maybe I should've explained myself better. It's basically like Figure 5 in this pdf https://www.analog.com/media/en/technical-documentation/technical-articles/LT3080PR_Article.pdf.

[bob91343]

Why use a post regulator at all?  A switching regulator probably can handle the whole job.

[TheHolyHorse]

Why use a post regulator at all?  A switching regulator probably can handle the whole job.

It probably can but the linear stage should attenuate some of the ripple, how much I've no idea. I'll just have to measure that. Or does someone know what to expect?

[MosherIV]

Linear stage will not have much effect on switcher psu noise.
The smps will work above 50KHz.
Linear stage control loop only work up to a few 100Hz, maybe low KHz.

Filtering will have the biggest effect on switching noise.

In effect the linear stage will remove the low freq noise but not much switching noise.

Still worth doing.

[TheHolyHorse]

Linear stage will not have much effect on switcher psu noise.
The smps will work above 50KHz.
Linear stage control loop only work up to a few 100Hz, maybe low KHz.

Filtering will have the biggest effect on switching noise.

In effect the linear stage will remove the low freq noise but not much switching noise.

Still worth doing.

That makes sense, thanks!

Also in my mind the linear stage should limit the current faster if you would just suddenly short the inputs, provided I don't have to much output capacitance.

[David Hess]

So I'm working on a linear PSU with a pre regulator to increase efficiency. But I'm not sure how much higher the pre regulator should regulate. Using a PNP transistor it will be about 0.6V (or whatever the voltage drop is across the emitter and base) above the output voltage.

The dropout voltage for a PNP high side regulator depends on the collector-to-emitter saturation voltage which can be much lower than the base-emitter voltage.

What are the benefits of higher pre regulator voltage? Will it regulate better with a slightly higher voltage across the pass transistor? Or will it just cause more heat in the pass transistor with no benefit?

The pass transistor's gain and frequency response decrease close to saturation so yes, performance is better with a higher collector-to-emitter voltage.  I usually design for at least twice the saturation voltage at maximum output current which could be from 0.6 to 1.2 volts depending on the details.

Darlington output stages are not as affected because the Vbe of the driver transistor adds to the dropout voltage raising the Vce of the pass transistor, but I still double the saturation voltage to find the minimum dropout voltage.

[bdunham7]

It probably can but the linear stage should attenuate some of the ripple, how much I've no idea. I'll just have to measure that. Or does someone know what to expect?

It's hard to make a recommendation without knowing your exact application and needs.  I read the datasheets for the LT3080 and LT3493 and they are an interesting combo.

The ripple rejection specs for the LT3080 are stated at Vin - Vout = 2 volts.  The load regulation spec doesn't state a Vin - Vout, but the line transient response chart does--1.5V.   I would assume both ripple and transient load rejection would be better with a larger voltage drop, but I don't know what your needs are in this regard.  It looks to me like load transient response would dominate in making the decision as to you input voltage selection.

Although the ripple rejection of the LT3080 is pretty good up to the tens of kHz, the LT3493 operates at 750kHz, where the LT3080 only has 20db of rejection.  If that isn't good enough, you can use the old-school method of regulation by dissipation and just include a few RLC steps between the two.  This is especially helpful if you are concerned more with the power dissipation of the LT3080 than overall efficiency.  So, just as an example, you might set the output of the LT3493 to track 3 volts above the desired output and then have a series R+L followed by shunt C, repeat once or twice, and choose the values so that you are dropping 2 volts at full load, then let the LT3080 drop the remaining 1 volt at full load.

OTOH, using the two just as described in the application note may yield good enough results and you might just want to try that first. 

[TheHolyHorse]

Well I realize I might not have been very clear with what I'm doing, the pdf was just an example of what I'm basically doing except the LDO is not an LDO but a P channel mosfet.  In that example they use a p channel fet to set the pre regulator voltage. The voltage will be the output voltage of the LDO + the threshold voltage of the fet, but if I use a PNP BJT it will be the drop between emitter and base. That's where the talk about PNPs came from sorry.

So I think I'll just add a voltage divider on the feedback to the pre regulator so I can adjust it to whatever works the best.

[Doctorandus_P]

Ugs of MOSfets is often between 3 and 5V, which is plenty of difference for most regulators, but the 600mV B-E junction of a PNP is a bit low. Instead of resistors, you can modify the voltage by adding a few diodes (600mV each) or a LED (1.5V to 3V, depending on color and chemistry) in series with the base of the NPN transistor.

For RLC filters, be very careful with PCB layout. Changing currents through your GND tracks will create changing voltages, and if you use a GND point as reference that is not clean, then that noise is coupled into your reference and will also show up at the output.

[Cerebus]

Linear stage will not have much effect on switcher psu noise.
The smps will work above 50KHz.
Linear stage control loop only work up to a few 100Hz, maybe low KHz.

Why would you think that?



Still more than 30 dB ripple rejection at 100 kHz from an off the shelf regulator.

[MosherIV]

    Why would you think that?
Still more than 30 dB ripple rejection at 100 kHz from an off the shelf regulator. 

Thanks for being pedantic.

My point is that using a linear is not going to magically clean up the switching noise from a smps.
There will be some noise that will get through.

Yes it will clean a little of the noise but not all of it.

The op is looking to have the advantage of very low noise from linear psu without disadvantage of high power dissipation.
The point is that relying on the linear regulation is NOT going to totally remove the switching, the design WILL still need filters between the smps and linear stage.

[Siwastaja]

Design the switcher to run at some 500kHz. Now your "ripple" is at 500kHz and problematic noise is up to a few GHz. Most linear regulators are down to maybe -10dB at such frequencies; and even that is mostly thanks to the inductance and resistance of the regulator chip, and the capacitance added by the example circuit! Properly designed RLC stages will be better, but beware of amplification of ripple/noise at resonant frequencies.

The giveaway is, the higher you run the f_sw, the easier it is to filter, and the less an active linear regulator can do (or the more difficult it becomes to design such linear regulator). There are linear regulator ICs with excellent high frequency PSRR well over 1MHz, even over 10MHz, but these tend to be small point-of-load regulator ICs and not something you could use in an adjustable PSU.

Switching preregulator + linear post regulator based power supplies combine two nontrivial aspects that you must get right, both of them. Having either one lack in noise/ripple performance likely ruins the whole system. Also, as switching frequencies have gone higher, there is less and less reason to design such a system. I would not recommend beginners to waste time in such effort if they just want to have a decent power supply. If it is to learn about designing a complex system and learn doing both switchers and linear psus at the same time, then why not.

But often the answer is, "because I want low noise/ripple lab psu", and for that, a tracking switching preregulator + linear postregulator, is far from the silver bullet, quite the opposite.

Also note you can clean up the switcher noise quite a lot just by disable any pulse-skipping mode and slow down the edges juust a tiny bit; these choices decrease the efficiency, but the end result efficiency is still likely better than the efficiency of tracking pre-regulator SMPS + linear post-stage.

Also running the switcher at high frequency improves its transient response (including current limit response time). The switcher's inductor's energy storage is where the problem resides, but this has been getting smaller and smaller.

All this being said, it is definitely possible to improve the ripple, noise and transient response characteristics of a switcher by adding a linear post-stage, but the question is, do you really need such high performance, and if you do, are you able to design a circuit achieving it? Or, are you adding complexity "just in case"?

[Cerebus]

    Why would you think that?
Still more than 30 dB ripple rejection at 100 kHz from an off the shelf regulator. 

Thanks for being pedantic.

My point is that using a linear is not going to magically clean up the switching noise from a smps.
There will be some noise that will get through.

Yes it will clean a little of the noise but not all of it.

The op is looking to have the advantage of very low noise from linear psu without disadvantage of high power dissipation.
The point is that relying on the linear regulation is NOT going to totally remove the switching, the design WILL still need filters between the smps and linear stage.

Querying a error of several orders of magnitude is pedantic? Good luck with that...

[TheHolyHorse]

Design the switcher to run at some 500kHz. Now your "ripple" is at 500kHz and problematic noise is up to a few GHz. Most linear regulators are down to maybe -10dB at such frequencies; and even that is mostly thanks to the inductance and resistance of the regulator chip, and the capacitance added by the example circuit! Properly designed RLC stages will be better, but beware of amplification of ripple/noise at resonant frequencies.

The giveaway is, the higher you run the f_sw, the easier it is to filter, and the less an active linear regulator can do (or the more difficult it becomes to design such linear regulator). There are linear regulator ICs with excellent high frequency PSRR well over 1MHz, even over 10MHz, but these tend to be small point-of-load regulator ICs and not something you could use in an adjustable PSU.

Switching preregulator + linear post regulator based power supplies combine two nontrivial aspects that you must get right, both of them. Having either one lack in noise/ripple performance likely ruins the whole system. Also, as switching frequencies have gone higher, there is less and less reason to design such a system. I would not recommend beginners to waste time in such effort if they just want to have a decent power supply. If it is to learn about designing a complex system and learn doing both switchers and linear psus at the same time, then why not.

But often the answer is, "because I want low noise/ripple lab psu", and for that, a tracking switching preregulator + linear postregulator, is far from the silver bullet, quite the opposite.

Also note you can clean up the switcher noise quite a lot just by disable any pulse-skipping mode and slow down the edges juust a tiny bit; these choices decrease the efficiency, but the end result efficiency is still likely better than the efficiency of tracking pre-regulator SMPS + linear post-stage.

Also running the switcher at high frequency improves its transient response (including current limit response time). The switcher's inductor's energy storage is where the problem resides, but this has been getting smaller and smaller.

All this being said, it is definitely possible to improve the ripple, noise and transient response characteristics of a switcher by adding a linear post-stage, but the question is, do you really need such high performance, and if you do, are you able to design a circuit achieving it? Or, are you adding complexity "just in case"?

This is a great answer! The SMPS will run at 2MHz or so. Currently (according to the calculations given in the datasheet) I'll have 100mA ripple current and about 0.5mV ripple with 2x27uF caps. If this translates to reality I'll be more than happy, a few mV ripple wont be the end of the world for me. So the linear stage might be just that extra complexity for no reason. The thing that concerns me is that the SMPSs min voltage is 0.8V which will be to high if you where to short the inputs. Would it be a good idea to have a pass transistor to drop the voltage lower than 0.8V during current limiting in short circuit conditions?

Also just to confirm if I have 100mA ripple current I'll need caps rated for at least 100mA of ripple current right? If that's the case 2 250mA caps will be just fine?

[Vovk_Z]

As for the ripple current: it depends on how long product life do you need.

[Siwastaja]

Any proper SMPS controller provides at least crude current limit so that outputting below V setpoint does not cause infinite current (and exploding transistors) - this is because having the ramping reference soft-start isn't something to be relied upon, corner cases do exist, one of the most obvious being accidental output short circuit.

The problem is, if you are building a lab supply, you almost always want a Constant Current mode. And, 99.9% of SMPS control ICs on the market do not provide such mode, at least in usable form, because they are designed to be just voltage regulators. As a result, while constant current operation mode exists in all of them, it is (a) inaccurate, (b) typically running against it leads to a protection mode, latched (it just turns off until power is cycled) or hickup (restarting once a second or so, so that average current is minuscule), because in typical application (think about generating an operating voltage to a CPU inside a product), running against current limit after short initial capacitor charging is a failure condition.

This is a bit sad, because there is absolutely no fundamental technical reason for such limitation. It's just market optimization.

So if you do need proper support for CC-CV, you need to very carefully look for suitable controller IC, or roll your own (basically, using a software-controlled topology, I'd recommend STM32F334); doing it in analog + logic ICs is going to be a large board&BOM.

You may be able to kludge it by getting creative with the FB pin but the transient response for current limitation won't be the greatest. Optimally the current control loop should be inner and the voltage loop slower, outer loop but you can't get this by the exposed FB pin if it's subject to internal loop compensation.

[Siwastaja]

By talking about ripple current ratings, it seems you are considering electrolytic caps? But if you run at 2MHz and require ~ 60uF of output capacitance, use MLCCs. ESR and ripple current rating won't be problem them; also lowest ESR means lowest ESR-related ripple voltage - leaving you with capacitance-related ripple (charging and discharging during switching period) and inductance-related noise-pass-through (so minimize package size and sprinkle multiple in parallel).

Do note that if you are talking about a buck converter, the stress on the input caps is far more than the stress on the output caps. Again, at 2MHz, you can easily use enough MLCCs to take most of the ripple, and add high-ESR electrolytic for power network damping.

[bdunham7]

The thing that concerns me is that the SMPSs min voltage is 0.8V which will be to high if you where to short the inputs. Would it be a good idea to have a pass transistor to drop the voltage lower than 0.8V during current limiting in short circuit conditions?

How do you want it to behave under short-circuit output conditions?  Or any overcurrent conditions, for that matter?

Also just to confirm if I have 100mA ripple current I'll need caps rated for at least 100mA of ripple current right? If that's the case 2 250mA caps will be just fine?

You've already received good advice on this, but I would point out that if you were to take 2 ordinary Low-ESR 27uF electrolytics and measure them on an LCR meter that had 2MHz capability, you would likely be shocked to see that at that frequency they read as negative capacitance. 

[Siwastaja]

Electrolytics likely have too much ESL due to the typical construction and leg spacing, yes. Running above SRF in itself isn't a problem given the impedance is acceptably low, but the impedance at 2MHz will be still too high.

For 2MHz, you really need to think about the loops and ESL. I would try to use 0805 parts if at all possible assuming this is low voltage (say below 30V), but seeing you want to have such high capacitance maybe 1210 is quite OK. Place several vias around the pads, with 1210 you easily can place vias under the component as well.

[TheHolyHorse]

Also just to confirm if I have 100mA ripple current I'll need caps rated for at least 100mA of ripple current right? If that's the case 2 250mA caps will be just fine?

You've already received good advice on this, but I would point out that if you were to take 2 ordinary Low-ESR 27uF electrolytics and measure them on an LCR meter that had 2MHz capability, you would likely be shocked to see that at that frequency they read as negative capacitance. 

By talking about ripple current ratings, it seems you are considering electrolytic caps? But if you run at 2MHz and require ~ 60uF of output capacitance, use MLCCs. ESR and ripple current rating won't be problem them; also lowest ESR means lowest ESR-related ripple voltage - leaving you with capacitance-related ripple (charging and discharging during switching period) and inductance-related noise-pass-through (so minimize package size and sprinkle multiple in parallel).

Do note that if you are talking about a buck converter, the stress on the input caps is far more than the stress on the output caps. Again, at 2MHz, you can easily use enough MLCCs to take most of the ripple, and add high-ESR electrolytic for power network damping.

Thanks for pointing this out. I don't necessarily need that high capacitance I just selected some value to feed the formula. With 10uF I still get below 1mV of ripple. (Ignoring ESR in the calculation)

Electrolytics likely have too much ESL due to the typical construction and leg spacing, yes. Running above SRF in itself isn't a problem given the impedance is acceptably low, but the impedance at 2MHz will be still too high.

For 2MHz, you really need to think about the loops and ESL. I would try to use 0805 parts if at all possible assuming this is low voltage (say below 30V), but seeing you want to have such high capacitance maybe 1210 is quite OK. Place several vias around the pads, with 1210 you easily can place vias under the component as well.

I can use 0805 or any size really board space is not an issue. The output voltage of the PSU will be max 20V. So placing 10 or so 1uF 50V MLCCs on the output might just do it.

[TheHolyHorse]

The thing that concerns me is that the SMPSs min voltage is 0.8V which will be to high if you where to short the inputs. Would it be a good idea to have a pass transistor to drop the voltage lower than 0.8V during current limiting in short circuit conditions?

How do you want it to behave under short-circuit output conditions?  Or any overcurrent conditions, for that matter?

I want it to go into CC mode.

Any proper SMPS controller provides at least crude current limit so that outputting below V setpoint does not cause infinite current (and exploding transistors) - this is because having the ramping reference soft-start isn't something to be relied upon, corner cases do exist, one of the most obvious being accidental output short circuit.

The problem is, if you are building a lab supply, you almost always want a Constant Current mode. And, 99.9% of SMPS control ICs on the market do not provide such mode, at least in usable form, because they are designed to be just voltage regulators. As a result, while constant current operation mode exists in all of them, it is (a) inaccurate, (b) typically running against it leads to a protection mode, latched (it just turns off until power is cycled) or hickup (restarting once a second or so, so that average current is minuscule), because in typical application (think about generating an operating voltage to a CPU inside a product), running against current limit after short initial capacitor charging is a failure condition.

This is a bit sad, because there is absolutely no fundamental technical reason for such limitation. It's just market optimization.

So if you do need proper support for CC-CV, you need to very carefully look for suitable controller IC, or roll your own (basically, using a software-controlled topology, I'd recommend STM32F334); doing it in analog + logic ICs is going to be a large board&BOM.

You may be able to kludge it by getting creative with the FB pin but the transient response for current limitation won't be the greatest. Optimally the current control loop should be inner and the voltage loop slower, outer loop but you can't get this by the exposed FB pin if it's subject to internal loop compensation.

The IC I'm using has internal compensation so my idea of messing with the FB pin might not be that good. Rolling my own could be fun, this project is mostly a learning experience and to have a PSU.

[Siwastaja]

Try messing with the FB pin first. It could work out good enough.

At 20V max, I'd likely use 4.7uF 0805 X7R caps rated at some 30-40% actual C at 20V bias so a bit under 2µF per cap.

But still assuming this is a buck, the input caps are more interesting, and the loop is more critical. After all, the output caps already have massive inductance - the inductor! - in the loop. OTOH, the input caps need to handle the square-wavish current where Imin = 0 and Ipeak=Iout + Iripple/2. Output caps only see the triangle ramp between Iout - Iripple/2 and Iout + Iripple/2.

If the input bypassing is poor or layout has problems, the input side can spew noise all over your circuit, including output.