Help me route HS-USB on Dual Layer Board

[luisr]

Hi guys

I'm designing a Breakout Board for a LPC1837JBD144 for personal use and development.
After reading some HS-USB signal integrity articles I found one very interesting that fits just my design http://www.focusembedded.com/blog/high-speed-usb-in-a-two-layer-pcb/
That article recommends to options when using fiberglass as core (0.062? thickness):
1.- Use 18mil traces with a separation of 6mil from each other
2.- Use “Co-Planar Waveguide” (CPWG) routing technique with 12mil traces and put GND between D+ and D-

Now, I did some routing test and with 6mil clearance I can route using 18mil traces necking down to 15mil when approaching to the microcontroller pins, so... I can probably get away doing this. The second suggestions is not an option for me because I must route the trace through the corner of the microcontroller (between pins 36 and 37) and go under it in order to avoid using vias.

I was trying to validate those values using Saturn PCB Design calculator and it gave me and Invalid input error, I would need to use 18mil/8mil to get it to calculate Zdiff and even then it would be way out the required 90ohms (Zdiff=127.216 Ohms Zo=110.446 Ohms)

Do I really need to go with 4 layer pcb and use buried striplines in order to use high speed usb? I know I would no be able to achieve 480Mbits/s but I want to get my design as fast as possible!

Thanks in advance

P.S I'm using eagle's length-freq-ri.ulp script and the difference in length between D- and D+ is about 1.01mm! that makes me wonder what would be the max difference in length before signal integrity becomes an issue (clock data skew is the term?) for this kind of signal (480Mhz)