### Author Topic: high speed signals  (Read 7112 times)

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#### Write_to_Smokegenerator

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##### high speed signals
« on: March 12, 2012, 08:46:12 am »
Hello

i've got a quick question, on what Frequency's can you talk about high speed signals, 100 MHz, 1GHz  more?
Did a quick Internet search didn't find any good explanations.

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#### slateraptor

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##### Re: high speed signals
« Reply #1 on: March 12, 2012, 09:10:59 am »
You probably didn't find anything because you're asking the wrong question.

The correct question to ask is, "When can we no longer ignore transmission line effects?"

Do a google search for transmission line and telegrapher's equations to start.

#### jahonen

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##### Re: high speed signals
« Reply #2 on: March 12, 2012, 09:23:16 am »
I think that most people won't get any clue by examining telegrapher's equations how to practically deal with high-speed signals

Unless you are working with narrow-band signals around high frequency carrier (RF), the frequency is not so obvious indicator if something is "high-speed".

Generally better approach for digital signals is to look at the edge rate (rise&fall-times). If this time starts to be of same magnitude than round-trip time of the signal in transmission medium (of course, if there are no ground plane under the signal, that is first thing to add that to make proper transmission line environment), then we must take proper care to suppress reflections. Simplest termination is just a series resistor at driving end, for point-to-point signals.

Regards,
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#### Write_to_Smokegenerator

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##### Re: high speed signals
« Reply #3 on: March 12, 2012, 09:44:15 am »
Interessting didn't know that there isn't a clear explanation.
I'm asking because a friend an I are working on a Hobby Project which envolves some Digital Signals with about 66 MHz.
We know some tricks like adepted Wire length,  (4 layer PCB one layer is VCC and one is GND)
but i think there are many more tricks. It' s out firs project with such high frequencys
Anyways thx for the quick answers
cheers.
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#### slateraptor

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##### Re: high speed signals
« Reply #4 on: March 12, 2012, 09:44:55 am »
I think that most people won't get any clue by examining telegrapher's equations how to practically deal with high-speed signals

Admittedly true, but the question struck me as being more gee-whiz inquisitive than practical.

An old professor once told me that in today's digital world, paper catalogs are still useful if only for the convenience of making yourself aware of what the "market" has to offer while preoccupied on the crapper.

#### jahonen

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##### Re: high speed signals
« Reply #5 on: March 12, 2012, 10:02:51 am »
Interessting didn't know that there isn't a clear explanation.
I'm asking because a friend an I are working on a Hobby Project which envolves some Digital Signals with about 66 MHz.
We know some tricks like adepted Wire length,  (4 layer PCB one layer is VCC and one is GND)
but i think there are many more tricks. It' s out firs project with such high frequencys
Anyways thx for the quick answers
cheers.

I think that if you look up some methods for signal termination and apply those rules wisely, then you'll be just fine. If you want to optimize your terminations, then you'll need a reasonably high-bandwidth scope with suitable probe. But often one gets away with just putting terminations in ballpark.

Length matching is just for timing optimization (skew minimization between signals when margins are not great to start with), it doesn't have anything to do with signal integrity (pulse shape preservation), although it is often used in same context, for example in memory buses.

Regards,
Janne

#### Mint.

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##### Re: high speed signals
« Reply #6 on: March 12, 2012, 10:22:48 am »
I don't know much about signals, but I recently read that clock speeds (2.4Ghz) on computer processors are getting close to the speed of light, and if we go more than speed of light we are going to be facing some problems. I just scanned through the article, it was not much interest to me so I don't know the exact detail. Anyways, food for thought.
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#### Write_to_Smokegenerator

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##### Re: high speed signals
« Reply #7 on: March 12, 2012, 10:40:09 am »

Length matching is just for timing optimization (skew minimization between signals when margins are not great to start with), it doesn't have anything to do with signal integrity (pulse shape preservation), although it is often used in same context, for example in memory buses.

Regards,
Janne
[/quote]

Argh yeah that's right my mistake of coures we have it for time matching and not for signal optimation (stupid me )

@ Janne thanks we will look up for the basic tricks

I don't know much about signals, but I recently read that clock speeds (2.4Ghz) on computer processors are getting close to the speed of light,

If you look up at frequencys at 3 GHz the light makes about 10 cm wich is really hard for teh PCB Designer because the lenght of the wires is really sensitive

Thanks for the answers I will post our project in the near future.

cheers

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#### T4P

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##### Re: high speed signals
« Reply #8 on: March 12, 2012, 12:34:45 pm »
I scramble to imagine how AMD managed to bring their FX-8150 up to 8.46GHz
Well , it's not them themselves , but a overclocker that decided to reign over AMD's brought in elite overclockers .

#### joelby

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##### Re: high speed signals
« Reply #9 on: March 12, 2012, 01:17:23 pm »
At very high speeds, propagation delays across a silicon die can limit maximum frequencies because setup and hold times must be long enough to guarantee that all inputs have settled. In ASICs, these issues are generally worked around by using complicated clocking schemes and trees rather than a single die-wide clock.

Higher switching speeds also lead to increased power dissipation, which is a limiting factor - many commercial users might shy away from chips that absolutely required cryogenic cooling.

#### T4P

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##### Re: high speed signals
« Reply #10 on: March 12, 2012, 07:38:21 pm »
At very high speeds, propagation delays across a silicon die can limit maximum frequencies because setup and hold times must be long enough to guarantee that all inputs have settled. In ASICs, these issues are generally worked around by using complicated clocking schemes and trees rather than a single die-wide clock.

Higher switching speeds also lead to increased power dissipation, which is a limiting factor - many commercial users might shy away from chips that absolutely required cryogenic cooling.

I know , that's why the chip on the market is nicely rated at 3.6GHz w/o load but can be clocked all the way to 5.5GHz on forced induction cooling , this chip really means business and actually was meant for cryogenic overcoolers to replace that long gone 64FX .
And it isn't a gamer's CPU , it's actually something that's so close to being one of their opterons ...
A good CPU if you do not game , but rather have like 8 CAD's open .
« Last Edit: March 12, 2012, 07:40:16 pm by Dave.S »

#### Write_to_Smokegenerator

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##### Re: high speed signals
« Reply #11 on: March 13, 2012, 09:00:25 pm »
Hi i checked out the back cover of book i bought recently (after listening to the AMP Hour)

I think i found the answer i was looking for

"Covers signal reflections, crosstalk, and noise problems that occur in high speed digital machines (20MHz to 20GHz and beyond)"
- High-Speed Digital Design, a Handbook of black Magic

I scramble to imagine how AMD managed to bring their FX-8150 up to 8.46GHz

me to

thanks for the answers
cheers
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#### Christe4nM

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##### Re: high speed signals
« Reply #12 on: March 18, 2012, 07:31:08 pm »
The official definition of "high speed" that I had to learn for a recent exam was: any situation where the rise- or falltime of a given signal is more faster than 20% of the propagationspeed of that signal. The propagation speed is the length of the pcb trace or signal path divided by the signal speed. And the signal speed is the speed of light divided by the squareroot of the conductive material's relative permeability.

In formula form:
high speed is where t_rise >=   <= 20% t_propagation.
T_propagation = l/v. (l= length of pcb trace or signal path)
v=c/sqrt(epsilon). (v=signal speed, c=speed of light, epsilon=relative permeability)

So there's no standard frequency that divides between high speed and not high speed. It realy depends on the situation. When sending 50Hz power across Russia you could speak of a high speed signal according above definition. The 50 Hz sinus is definately rising and falling faster than it takes to transport is across all of Russia ;-)

Also the engineers I spoke with at Thales Netherlands who work on radar systems consider everything below 1 GHz as DC ;-)

Edit: stupid mistake corrected
« Last Edit: March 20, 2012, 09:55:57 am by Christe4nM »

#### Write_to_Smokegenerator

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##### Re: high speed signals
« Reply #13 on: March 18, 2012, 09:36:46 pm »
Thank you for that explanation.
But unfortunately another question is coming to my mind.

I tried to apply this equation for my PCB

rise time 4 ns (according to the oscilloscope)
length 0.1m
FR4  Epsilon~4,3

after inserting this in the equation

v= 1,446728 x10^6 (i inserted for c 300 10^8 m/s)  3x10^8m/s of course (was a typo)
T_prop= 0,1/1,4467x10^6 = 691,21x10^-12

so 4ns >= 0,2x 691,21x10^-12
so it would be a high speed signal, the question is:

why is it because if the rise time is higher (=> 20% T_prop) according to my calculation near every signal on a 0.1m PCB trace would be high speed signal because 20% T_prop is really low.
Would be kind if someone can give me an answer?
cheers.

« Last Edit: March 19, 2012, 04:52:02 pm by Write_to_Smokegenerator »
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#### Christe4nM

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##### Re: high speed signals
« Reply #14 on: March 20, 2012, 09:31:05 am »
I made a mistake in the formula and explanation. Just when I tried to calculate to the frequencies that would be high speed in your case I found it:

High speed is when the risetime is faster than 20% of T_prop. Faster means in a shorter time. So when T_rise (or T_fall) is equal or SMALLER than 20% of T_prop, it's high speed. Otherwise even 50 Hz would be high speed in a 0.1m pcb trace. (Stupid me to substitute faster with > )

So its: T_rise <= 20% T_prop

Sorry for confusing you.

#### Write_to_Smokegenerator

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##### Re: high speed signals
« Reply #15 on: March 20, 2012, 10:25:52 am »
I thought that something didn't fit in

So it means a signal on a FR4 PCB with a length of 0.1m it would require 138.242 ps rise time (or less) to be a high speed signal? that doesn't seem correct either.
is there another error, maybe in my calculus?
thx for the reply.

cheers.
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#### jahonen

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##### Re: high speed signals
« Reply #16 on: March 20, 2012, 12:41:25 pm »
I think it means that if we have a stripline trace, and relative permittivity is 4.3 so 100 mm of trace means 100e-3*sqrt(4.3)/3e8=691 ps delay, which means that critical edge rate is (according to that 20% rule) 691e-12/0.2=3.5 ns. Thus if rise/fall-times are less or equal than 3.5 ns, termination is required.

Outer layer traces are somewhat faster due to smaller relative permittivity, but I think that above calculation is in the ballpark and errs on the safe side anyway.

Regards,
Janne

#### Write_to_Smokegenerator

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##### Re: high speed signals
« Reply #17 on: March 20, 2012, 08:07:43 pm »
That makes way more sense than my conclusion^^

Thank you for reply's.

Cheers
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