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| How to choose Mosfet resistor values for biasing and gate protection? |
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| spec:
--- Quote from: jnz on January 02, 2019, 06:31:59 pm ---Spec, Thanks a ton for the advice and taking the time to look up a part! That's a little smaller part than I need, like seriously tiny, but I'll see if the package makes sense. If not I'll find a common SOT sized part I know I'll never get stuck on lead times with. --- End quote --- My pleasure :) Yes, that is a tiny NMOSFET- I was in a rush when suggesting it. I will find a decent sized NMOSFET for you. --- Quote from: jnz on January 02, 2019, 06:31:59 pm ---Can you do me a quick favor. I get some of the issues with leakage current, but need to clarify that if the leakage is 10uA, that's "like" a 500k resistor to ground? Which is why 100k pull up and 500k pull down is a voltage divider to get 4.16V the gate would actually see - did I get that right? --- End quote --- It is indeterminate really, because from the datasheet the gate can source or sink 10uA worst case. What you can determine though is that if the gate is sinking 10uA there will be 10uA flowing through the 100K pull-up resistor, so there will be a 10uA * 100k = 1V drop across the 100K resistor. This means that the maximum voltage that the gate will ever see is 5V - 1V = 4V. If 4VG/S is sufficient to turn the NMOSFET on, the circuit will work OK. But if you increased the resistor to 500k the 10uA leakage current would cause a voltage drop of 5V so the gate could never get any higher than 0V, so it would never turn on. But, in real life, the NMOSFET would probably work OK with a higher value pull-up resistor. But the thing is why mess about with an NMOSFET that has a worst case leakage current of 10uA, when there are many other suitable NMOSFETs that have worst case leakage currents of only +-100nA. From a personal point of view, unless there were some other overriding factor, I would not consider a small signal MOSFET with a gate leakage current of 10uA for any design, even if the leakage current had no effect on the application whatsoever- why would you? Just a word about selecting components. There are three main approaches: * Worst case * Average values * It will be all right on the dayI always use worst case design whenever possible (not quite true, but a bit involved to describe here). So, for example, a particular BJT may have an average current gain (HFE) of 500, but a worst case HFE of only 100. Using the average HFE you may be able to get away with just one transistor for a particular circuit function, but using worst case you may need two BJTs in a Darlington configuration. The data sheet normally specifies average values and worst case values and you can design using average values, but then there is the risk that the very component that you buy is worst case and your circuit may not function. Average value design is used in some commercial products to reduce costs. On the production line, one in a hundred, say, of a particular PCB card may not work and would simply be trashed (for any fault). All right on the day is fairly self explanatory, I would suggest. A typical all right on the day design approach would be, I will be dissipating around 50W in this transistor so if I pop in a 50W transistor- it will be all right (on the day). :) |
| T3sl4co1l:
--- Quote from: jnz on January 02, 2019, 11:39:24 pm ---As to if the driver/gate opens, wouldn't the pullup prevent oscillations, or because it's so weak is this what you're saying? --- End quote --- We're not worried about oscillation once it's hard on (or off) -- there's not enough (small-signal) gain left to muck things up. Also, a pull(up/down) is no substitute for a gate resistor, in that the gate circuit oscillation has a low impedance. This can be found by taking Zo = sqrt(Lstray / Cg). Lstray in turn will be in the ballpark of mu_0 * length / 4, where length is the length of the stray inductance path (i.e., cables, traces, pins..). It's typically in the low ohms range, hence why modest value gate resistors are adequate, and why we wouldn't expect any contribution from a ~kohms resistor in parallel. If the driver is active and becomes disconnected and the pull resistor changes the transistor's state, then it's going through the linear range (on to off, off to on, whatever the case) where it can oscillate. In that case, there's a stub hanging off the gate (the wire/trace the driver used to be connected to), which can have interesting reactance at special frequencies -- but if we've still got the resistor there (or if the resistor burns out somehow, but it was placed close to the transistor, disconnecting the stub), that swamps the reactance and prevents oscillation. We can still screw things up in perhaps unexpected ways. A zener diode from source to gate makes a good gate voltage protector, but it's also a capacitance on a short lead inductance, and that combination has just the right impedance that it can oscillate -- typically in the 100s MHz, for fast transistors that can oscillate that high (which includes most high voltage switching (SuperJunction) transistors). In that case, simply putting the gate resistor closest, or using a ferrite bead or whatnot, does the trick. Tim |
| spec:
+ jnz Attached, as promised, is a list of a few NMOSFETs for you to consider. |
| spec:
About the gate stopper resistor. The main function of the gate stopper resistor, is to stop parasitic oscillations by the MOSFET of its own accord. To be effective the gate stopper must be placed close to the gate and not be too higher resistance. The oscillations are due to the parasitic L,C & R of both the MOSFET and the circuit layout. It is quite right that a hard pull up or pull down can prevent oscillations, but this is bad practice, especially for a non continually switching application like this, and, sooner or later, it will bite you. A hard pull up or pull down may not prevent oscillations though- it all depends on the layout, including decoupling. Bear in mind that when a MOSFET oscillates it is normally in the 1MHz to 20Mz range (always 4MHz with me :)) and at that frequency range the physical circuit and components are nothing like the schematic. And with the newer low voltage, low gate threshold, high conductance (and massive parasitic capacitance) MOSFETs the situation is much more critical. But anyway, in this application, there is not a hard pull down and the pull up is so weak (aiming for 1MR) that in terms of parasitic oscillations it is practically an open circuit or worse, due to the parasitics of a high value resistor. About the gate stopper protecting the driving circuit (MCU). This is rather an odd one, because what are you protecting the driving circuit from? Sure, if you are driving the MOSFET in a fire and brimstone situation, say a SMPS, where there are all sorts of nasty things going on at the MOSFET gate, but then there is no way you could be driving the MOSFET direct under those circumstances anyway. Any gate stopper that had a high enough resistance to protect the driving element would slug the MOSFET to hell and it would not be able to switch at even 50kHz let alone 4MHz used in some SMPS circuits. Instead you would have to use a gate driver chip between the MOSFET and the controlling element (MCU). In that situation the gate stopper, in conjunction with other components, would be used for shaping the gate waveform rather than stopping parasitic oscillations. Just a footnote about parasitic oscillations and protecting the driving element. There are a few options that can be used to tame an oscillating MOSFET, in addition to gate stoppers. David Hess mentioned an effective one: fit a lossy elements on the leads of the MOSFET. This could simply be a lossy ferrite bead placed on the MOSFET self leads, as you often see on commercial equipment, especially SMPS and TVs. If you do have a concern about protecting the input of a MOSFET driving element, there are simple techniques to achieve this without increasing the value of the gate stopper resistor: a couple of schottky catching diodes, for example. |
| T3sl4co1l:
An application of driver protection -- industrial modules. When an IGBT fails, well -- when any transistor fails with significant power available, it fails as a three-way short, connected by the expanding plasma ball that used to be the die and wire bonds. In an offline SMPS, or an industrial converter, say, that means hundreds of volts peak that appears at the gate resistor. I've designed a +/-15V, 15A peak gate driver with desat protection and isolation; when the desat protection wasn't enough and the IGBT failed, the driver always ended up partially damaged. I did add schottky diodes to clamp the driver output voltage to the supplies, but enough current still got into the driver to damage (but not explode) it. A somewhat more heroic effort would allow protection (bigger diodes, staged gate resistors?). Otherwise, figure it's going to die. A typical case in SMPSs is the controller chip (with internal driver) ends up poofed, so you have to replace half a dozen components (resistors, IC, transistor, fuse) to fix one. Tim |
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