How do I delay an enable line until power supply stability?

[MarkS]

I'm making a little project that will use the TXS0108E for level conversion. Section 10 of the datasheet states:

10.3 Power Supply Recommendations
....To ensure the high-impedance state of the outputs during power up or power down,
the OE input pin must be tied to GND through a pull-down resistor and must not be enabled until VCCA and
VCCB are fully ramped and stable. The minimum value of the pull-down resistor to ground is determined by the
current-sourcing capability of the driver.

So I need a pull down resistor on the enable line. No big deal. However, this chip will not be controlled from a MCU and will always be enabled. So.... Do I connect the enable line to VCCA with the pull down or skip the pull down all together? Or do I need to build in some delay into the enable circuit? 

[tooki]

Use an RC delay on the enable pin to delay it a predetermined amount. Or use a voltage regulator that has a “power good” output.

[MarkS]

Use an RC delay on the enable pin to delay it a predetermined amount. Or use a voltage regulator that has a “power good” output.

Wouldn't an RC circuit go low->high->low?

[shapirus]

Wouldn't an RC circuit go low->high->low?

Unless you specifically make it that way. Normally it won't.

If you wire it like this, the OE pin will see a typical RC curve with a gradually increasing voltage:


Power -> Resistor -> OE
                  |
                   -> Cap -> GND


One thing to keep in mind, however, is that nowhere in the datasheet it is stated that the OE pin is a Schmitt-trigger input. Therefore it should be assumed that it requires fast rise and fall edges of the controlling signal. It however doesn't necessarily mean that it won't work with a slowly rising signal: you can test it and see how it actually behaves.

Controlling OE with an output of a voltage supervisor IC, as suggested in the previous posts, is definitely better, but it requires an extra IC just to control one pin, which feels wasteful.
A middle ground solution might be to use a non-inverting single-gate Schmitt trigger IC (cheap and small) such as SN74LVC1G17 whose input would be fed from an RC chain and output would provide a nice square edge signal for the OE pin, once the input reaches the threshold voltage.
However, the latter requires 3 components: the gate IC (SOT-23-5), R, and C. A voltage supervisor IC might take less board space. Not sure about the cost though.

[srb1954]

Controlling OE with an output of a voltage supervisor IC, as suggested in the previous posts, is definitely better, but it requires an extra IC just to control one pin, which feels wasteful.

You probably should have a voltage supervisor IC for your MCU anyway so it could also control the transceiver OE as well. Supervisor ICs are generally more precise and more reliable than an MCU's in-built power-on-reset circuit and are more convenient to use when chips external to the MCU also require a power-on reset signal.

There are dual supply supervisors available so both supplies to the transceiver could be monitored to ensure that both supplies have stabilised before activating the circuit.

[tooki]

Use an RC delay on the enable pin to delay it a predetermined amount. Or use a voltage regulator that has a “power good” output.

Wouldn't an RC circuit go low->high->low?

Depending on the position of the resistor, it’s low->high or high->low. As the cap charges (Vc), the resistor’s voltage (Vr) is the difference between the supply voltage and Vc. See my crappy sketch.

[shapirus]

A useful mnemonic for understanding this better is that a capacitor acts as a short circuit to the potential applied between its terminals when it's not charged and as an open circuit when it is charged (provided that the charge potential is equal to the potential being applied).

[tooki]

A useful mnemonic for understanding this better is that a capacitor acts as a short circuit to the potential applied between its terminals when it's not charged and as an open circuit when it is charged

Well that helps you understand the current flow, but I don’t find it helpful with regards to voltage change over time, which is what’s relevant here.

(provided that the charge potential is equal to the potential being applied).

??

[shapirus]

(provided that the charge potential is equal to the potential being applied).

??

Confusing wording, maybe. What I meant was that a capacitor (an ideal one) presents an open circuit to a potential applied to its terminals if it was already charged to an equal potential.

[MarkS]

My concern, and it's probably a misunderstanding, is that a RC circuit "returns" to its previous state at some point. What's to stop the circuit from retriggering? As long as it goes high and stays high, a RC circuit would be ideal. Looking at the datasheet for the switching regulator I'm going to use, it takes roughly 375uS to stabilize. A 500uS delay would be perfectly fine.

[shapirus]

What's to stop the circuit from retriggering?

Nah, the right question would be: "what's to make it retrigger?"

[tooki]

My concern, and it's probably a misunderstanding, is that a RC circuit "returns" to its previous state at some point. What's to stop the circuit from retriggering? As long as it goes high and stays high, a RC circuit would be ideal. Looking at the datasheet for the switching regulator I'm going to use, it takes roughly 375uS to stabilize. A 500uS delay would be perfectly fine.

The capacitor is charged by the (in my example) 5V rail, through the resistor. The rate at which a capacitor charges is a function of the current flowing into it.

Suppose we use a 1μF capacitor and a 10kOhm resistor. At t=0s, the capacitor is at 0V, so the resistor sees the entire 5V. Ohm’s law tells us that the current flow at t=0s is 5V/10kOhm=0.5mA. As the current charges the cap, the cap’s voltage rises, so the resistor’s voltage drops accordingly, which in turn means the current shrinks. This gives us the exponential curve shown. (And it’s technically an asymptote, since in theory the cap will never quite charge to the full 5V, as the ever-shrinking voltage across the resistor means the charging current also shrinks.) But in practice we can say that it does charge fully, and this is defined as 5τ (5 Tau), where τ is the RC time constant, that is, R x C. That is the time it takes to charge to 63% of the supply voltage. Here that’s 10kOhm x 1μF = 10ms. So that means that in 1 τ (10ms), the cap will charge to 0.63x5V = 3.15V, and that it’ll charge to ≈5V in 50ms.

Now, since the supply voltage hasn’t been removed — we’re charging the cap with the 5V supply, not a signal — it’ll stay charged at 5V indefinitely. The capacitor charging simply delays the EN line reaching 5V (or 0V, depending on which of the two circuits you use) by a fraction of a second.

Bear in mind that you may not even need the delay. If you don’t care about the outputs being active while the power supply settles, you can just tie OE to your supply with a pull-up resistor.

But if you do: while the recommended “high” input for OE is V_CCA x 0.67 minimum, it’s probably more sensitive in practice and may well trigger at lower voltages, so I’d give it some margin, let’s say V_CCA x 0.5.

Charging to 0.5x the voltage happens in 0.7 τ.
500μs/0.7 = 714μs

So let’s just round that up to 1ms.
For example, using a cheap, ubiquitous 100nF cap:
τ = RC
so R = τ/C
1ms / 100nF = 10kOhms

Heck, design your PCB to have the 100nF cap and 10k resistor, and you can just test it with only the resistor populated (i.e. your pull-up, with no delay) and if you’re not happy, solder in the cap.